]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
iommu: KVM: Split "struct vcpu_data" into separate AMD vs. Intel structs
authorSean Christopherson <seanjc@google.com>
Wed, 11 Jun 2025 22:45:34 +0000 (15:45 -0700)
committerSean Christopherson <seanjc@google.com>
Mon, 23 Jun 2025 16:50:31 +0000 (09:50 -0700)
Split the vcpu_data structure that serves as a handoff from KVM to IOMMU
drivers into vendor specific structures.  Overloading a single structure
makes the code hard to read and maintain, is *very* misleading as it
suggests that mixing vendors is actually supported, and bastardizing
Intel's posted interrupt descriptor address when AMD's IOMMU already has
its own structure is quite unnecessary.

Tested-by: Sairaj Kodilkar <sarunkod@amd.com>
Link: https://lore.kernel.org/r/20250611224604.313496-33-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
arch/x86/include/asm/irq_remapping.h
arch/x86/kvm/svm/avic.c
arch/x86/kvm/vmx/posted_intr.c
drivers/iommu/amd/iommu.c
drivers/iommu/intel/irq_remapping.c
include/linux/amd-iommu.h

index 5036f13ab69f632f7bed3a1449572b26feb5335c..2dbc9cb61c2fe61ac83cdd14c30b09ffbc209844 100644 (file)
@@ -26,7 +26,20 @@ enum {
        IRQ_REMAP_X2APIC_MODE,
 };
 
-struct vcpu_data {
+/*
+ * This is mainly used to communicate information back-and-forth
+ * between SVM and IOMMU for setting up and tearing down posted
+ * interrupt
+ */
+struct amd_iommu_pi_data {
+       u64 vapic_addr;         /* Physical address of the vCPU's vAPIC. */
+       u32 ga_tag;
+       u32 vector;             /* Guest vector of the interrupt */
+       bool is_guest_mode;
+       void *ir_data;
+};
+
+struct intel_iommu_pi_data {
        u64 pi_desc_addr;       /* Physical address of PI Descriptor */
        u32 vector;             /* Guest vector of the interrupt */
 };
index eed5c58ac07f27dcc35dd3f7233d57ad7674c98e..dc1526fef18d73cb478f62b504b080e3098e1869 100644 (file)
@@ -823,23 +823,18 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
         */
        if (vcpu && kvm_vcpu_apicv_active(vcpu)) {
                /*
-                * Try to enable guest_mode in IRTE.  Note, the address
-                * of the vCPU's AVIC backing page is passed to the
-                * IOMMU via vcpu_info->pi_desc_addr.
+                * Try to enable guest_mode in IRTE.
                 */
-               struct vcpu_data vcpu_info = {
-                       .pi_desc_addr = avic_get_backing_page_address(to_svm(vcpu)),
-                       .vector = vector,
-               };
-
-               struct amd_iommu_pi_data pi = {
-                       .ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, vcpu->vcpu_id),
+               struct amd_iommu_pi_data pi_data = {
+                       .ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id,
+                                            vcpu->vcpu_id),
                        .is_guest_mode = true,
-                       .vcpu_data = &vcpu_info,
+                       .vapic_addr = avic_get_backing_page_address(to_svm(vcpu)),
+                       .vector = vector,
                };
                int ret;
 
-               ret = irq_set_vcpu_affinity(host_irq, &pi);
+               ret = irq_set_vcpu_affinity(host_irq, &pi_data);
                if (ret)
                        return ret;
 
@@ -850,7 +845,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
                 * we can reference to them directly when we update vcpu
                 * scheduling information in IOMMU irte.
                 */
-               return svm_ir_list_add(to_svm(vcpu), irqfd, &pi);
+               return svm_ir_list_add(to_svm(vcpu), irqfd, &pi_data);
        }
        return irq_set_vcpu_affinity(host_irq, NULL);
 }
index 687ffde3b61c79d57b6cc33e84f5fa29273adf36..3a23c30f73cb8d3e89fe7f0f471d2125392142eb 100644 (file)
@@ -303,12 +303,12 @@ int vmx_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
                       struct kvm_vcpu *vcpu, u32 vector)
 {
        if (vcpu) {
-               struct vcpu_data vcpu_info = {
+               struct intel_iommu_pi_data pi_data = {
                        .pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu)),
                        .vector = vector,
                };
 
-               return irq_set_vcpu_affinity(host_irq, &vcpu_info);
+               return irq_set_vcpu_affinity(host_irq, &pi_data);
        } else {
                return irq_set_vcpu_affinity(host_irq, NULL);
        }
index e8e259c07265658da0079363a233d8f7475e3e34..8366d32252cdbb0c560ad1c2bea2c1b27b1762da 100644 (file)
@@ -3860,10 +3860,10 @@ int amd_iommu_deactivate_guest_mode(void *data)
 }
 EXPORT_SYMBOL(amd_iommu_deactivate_guest_mode);
 
-static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *vcpu_info)
+static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info)
 {
        int ret;
-       struct amd_iommu_pi_data *pi_data = vcpu_info;
+       struct amd_iommu_pi_data *pi_data = info;
        struct amd_ir_data *ir_data = data->chip_data;
        struct irq_2_irte *irte_info = &ir_data->irq_2_irte;
        struct iommu_dev_data *dev_data;
@@ -3886,14 +3886,10 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *vcpu_info)
        ir_data->cfg = irqd_cfg(data);
 
        if (pi_data) {
-               struct vcpu_data *vcpu_pi_info = pi_data->vcpu_data;
-
                pi_data->ir_data = ir_data;
 
-               WARN_ON_ONCE(!pi_data->is_guest_mode);
-
-               ir_data->ga_root_ptr = (vcpu_pi_info->pi_desc_addr >> 12);
-               ir_data->ga_vector = vcpu_pi_info->vector;
+               ir_data->ga_root_ptr = (pi_data->vapic_addr >> 12);
+               ir_data->ga_vector = pi_data->vector;
                ir_data->ga_tag = pi_data->ga_tag;
                ret = amd_iommu_activate_guest_mode(ir_data);
        } else {
index cf7b6882ec755ba30fce33cbd8fae61b79fa83e0..2fc451253dc35c1ee528ae6c20350a6101d2f24e 100644 (file)
@@ -1244,10 +1244,10 @@ static void intel_ir_compose_msi_msg(struct irq_data *irq_data,
 static int intel_ir_set_vcpu_affinity(struct irq_data *data, void *info)
 {
        struct intel_ir_data *ir_data = data->chip_data;
-       struct vcpu_data *vcpu_pi_info = info;
+       struct intel_iommu_pi_data *pi_data = info;
 
        /* stop posting interrupts, back to the default mode */
-       if (!vcpu_pi_info) {
+       if (!pi_data) {
                __intel_ir_reconfigure_irte(data, true);
        } else {
                struct irte irte_pi;
@@ -1265,10 +1265,10 @@ static int intel_ir_set_vcpu_affinity(struct irq_data *data, void *info)
                /* Update the posted mode fields */
                irte_pi.p_pst = 1;
                irte_pi.p_urgent = 0;
-               irte_pi.p_vector = vcpu_pi_info->vector;
-               irte_pi.pda_l = (vcpu_pi_info->pi_desc_addr >>
+               irte_pi.p_vector = pi_data->vector;
+               irte_pi.pda_l = (pi_data->pi_desc_addr >>
                                (32 - PDA_LOW_BIT)) & ~(-1UL << PDA_LOW_BIT);
-               irte_pi.pda_h = (vcpu_pi_info->pi_desc_addr >> 32) &
+               irte_pi.pda_h = (pi_data->pi_desc_addr >> 32) &
                                ~(-1UL << PDA_HIGH_BIT);
 
                ir_data->irq_2_iommu.posted_vcpu = true;
index deeefc92a5cf52b9f6f20897ae78c16af0ba72bf..99b4fa9a0296156e3fe51313e2828c54d40add39 100644 (file)
 
 struct amd_iommu;
 
-/*
- * This is mainly used to communicate information back-and-forth
- * between SVM and IOMMU for setting up and tearing down posted
- * interrupt
- */
-struct amd_iommu_pi_data {
-       u32 ga_tag;
-       bool is_guest_mode;
-       struct vcpu_data *vcpu_data;
-       void *ir_data;
-};
-
 #ifdef CONFIG_AMD_IOMMU
 
 struct task_struct;