amdgcn: Allow vector reductions on constants

Obviously it would be better if these reductions could be evaluated at compile
time, but this will avoid an ICE.

gcc/ChangeLog:

	* config/gcn/gcn.c (gcn_expand_reduc_scalar): Use force_reg.

(cherry picked from commit d51cad0b840a14c66732cb6a166c11ddf55d18b2)

diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 93b66fa8497061c3c06e2d325d923d7ab5da1827..5c390c69865b99469bbb9456d0b65cb871142b79 100644 (file)
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -4431,7 +4431,7 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
      pair of lanes, then on every pair of results from the previous
      iteration (thereby effectively reducing every 4 lanes) and so on until
      all lanes are reduced.  */
-  rtx in, out = src;
+  rtx in, out = force_reg (mode, src);
   for (int i = 0, shift = 1; i < 6; i++, shift <<= 1)
     {
       rtx shift_val = gen_rtx_CONST_INT (VOIDmode, shift);