]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
cxl/events: Fix Trace DRAM Event Record
authorShiju Jose <shiju.jose@huawei.com>
Mon, 14 Oct 2024 14:30:03 +0000 (15:30 +0100)
committerIra Weiny <ira.weiny@intel.com>
Fri, 25 Oct 2024 16:23:26 +0000 (11:23 -0500)
CXL spec rev 3.0 section 8.2.9.2.1.2 defines the DRAM Event Record.

Fix decode memory event type field of DRAM Event Record.
For e.g. if value is 0x1 it will be reported as an Invalid Address
(General Media Event Record - Memory Event Type) instead of Scrub Media
ECC Error (DRAM Event Record - Memory Event Type) and so on.

Fixes: 2d6c1e6d60ba ("cxl/mem: Trace DRAM Event Record")
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Link: https://patch.msgid.link/20241014143003.1170-1-shiju.jose@huawei.com
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
drivers/cxl/core/trace.h

index 8672b42ee4d1b376063b09d29922fcce83a70168..8389a94adb1a681827209db46360d3d57c6672ce 100644 (file)
@@ -279,7 +279,7 @@ TRACE_EVENT(cxl_generic_event,
 #define CXL_GMER_MEM_EVT_TYPE_ECC_ERROR                        0x00
 #define CXL_GMER_MEM_EVT_TYPE_INV_ADDR                 0x01
 #define CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR          0x02
-#define show_mem_event_type(type)      __print_symbolic(type,                  \
+#define show_gmer_mem_event_type(type) __print_symbolic(type,                  \
        { CXL_GMER_MEM_EVT_TYPE_ECC_ERROR,              "ECC Error" },          \
        { CXL_GMER_MEM_EVT_TYPE_INV_ADDR,               "Invalid Address" },    \
        { CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,        "Data Path Error" }     \
@@ -373,7 +373,7 @@ TRACE_EVENT(cxl_general_media,
                "hpa=%llx region=%s region_uuid=%pUb",
                __entry->dpa, show_dpa_flags(__entry->dpa_flags),
                show_event_desc_flags(__entry->descriptor),
-               show_mem_event_type(__entry->type),
+               show_gmer_mem_event_type(__entry->type),
                show_trans_type(__entry->transaction_type),
                __entry->channel, __entry->rank, __entry->device,
                __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
@@ -391,6 +391,17 @@ TRACE_EVENT(cxl_general_media,
  * DRAM Event Record defines many fields the same as the General Media Event
  * Record.  Reuse those definitions as appropriate.
  */
+#define CXL_DER_MEM_EVT_TYPE_ECC_ERROR                 0x00
+#define CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR     0x01
+#define CXL_DER_MEM_EVT_TYPE_INV_ADDR                  0x02
+#define CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR           0x03
+#define show_dram_mem_event_type(type)  __print_symbolic(type,                         \
+       { CXL_DER_MEM_EVT_TYPE_ECC_ERROR,               "ECC Error" },                  \
+       { CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR,   "Scrub Media ECC Error" },      \
+       { CXL_DER_MEM_EVT_TYPE_INV_ADDR,                "Invalid Address" },            \
+       { CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR,         "Data Path Error" }             \
+)
+
 #define CXL_DER_VALID_CHANNEL                          BIT(0)
 #define CXL_DER_VALID_RANK                             BIT(1)
 #define CXL_DER_VALID_NIBBLE                           BIT(2)
@@ -477,7 +488,7 @@ TRACE_EVENT(cxl_dram,
                "hpa=%llx region=%s region_uuid=%pUb",
                __entry->dpa, show_dpa_flags(__entry->dpa_flags),
                show_event_desc_flags(__entry->descriptor),
-               show_mem_event_type(__entry->type),
+               show_dram_mem_event_type(__entry->type),
                show_trans_type(__entry->transaction_type),
                __entry->channel, __entry->rank, __entry->nibble_mask,
                __entry->bank_group, __entry->bank,