aarch64: Fix UB in ifunc resolvers

When building with ubsan the ifunc resolvers triggers:

UBSAN: Undefined behaviour in ../sysdeps/aarch64/multiarch/memchr.c:34:1 left shift of 255 by 24 cannot be represented in type 'int'

The midr is defined as uint64_t, so use UINT64_C to define the masks
as well.

diff --git a/sysdeps/aarch64/cpu-features.h b/sysdeps/aarch64/cpu-features.h
index ef4e947e8c64a5f6a3de030273e152f2837d588b..a647db10a37be94415ac8209e2473e0b9eff4fb7 100644 (file)
--- a/sysdeps/aarch64/cpu-features.h
+++ b/sysdeps/aarch64/cpu-features.h
@@ -24,19 +24,19 @@
 #include <stdbool.h>
 
 #define MIDR_PARTNUM_SHIFT     4
-#define MIDR_PARTNUM_MASK      (0xfff << MIDR_PARTNUM_SHIFT)
+#define MIDR_PARTNUM_MASK      (UINT64_C(0xfff) << MIDR_PARTNUM_SHIFT)
 #define MIDR_PARTNUM(midr)     \
        (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
 #define MIDR_ARCHITECTURE_SHIFT        16
-#define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT)
+#define MIDR_ARCHITECTURE_MASK (UINT64_C(0xf) << MIDR_ARCHITECTURE_SHIFT)
 #define MIDR_ARCHITECTURE(midr)        \
        (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
 #define MIDR_VARIANT_SHIFT     20
-#define MIDR_VARIANT_MASK      (0xf << MIDR_VARIANT_SHIFT)
+#define MIDR_VARIANT_MASK      (UINT64_C(0xf) << MIDR_VARIANT_SHIFT)
 #define MIDR_VARIANT(midr)     \
        (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
 #define MIDR_IMPLEMENTOR_SHIFT 24
-#define MIDR_IMPLEMENTOR_MASK  (0xff << MIDR_IMPLEMENTOR_SHIFT)
+#define MIDR_IMPLEMENTOR_MASK  (UINT64_C(0xff) << MIDR_IMPLEMENTOR_SHIFT)
 #define MIDR_IMPLEMENTOR(midr) \
        (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)