]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: ath12k: Enable memory profile selection for QCN9274
authorAaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>
Tue, 8 Jul 2025 18:11:02 +0000 (23:41 +0530)
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>
Mon, 14 Jul 2025 14:32:16 +0000 (07:32 -0700)
The QCN9274 supports two memory profiles: a default profile and a
low-memory profile. The driver signals the firmware to enable
low-memory optimizations using the QMI initialization service.

Add support to select the low-memory profile on system with less than
512 MB RAM.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.5-01651-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 WLAN.HMT.1.1.c5-00284.1-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Link: https://patch.msgid.link/20250708181102.4111054-5-aaradhana.sahu@oss.qualcomm.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
drivers/net/wireless/ath/ath12k/ahb.c
drivers/net/wireless/ath/ath12k/core.c
drivers/net/wireless/ath/ath12k/core.h
drivers/net/wireless/ath/ath12k/pci.c
drivers/net/wireless/ath/ath12k/qmi.c

index 8d1a86e420a431a5ae71f18a4eab79dc39bd8bcf..3b983f4e3268c6fbf1546bda6677d2bf2d985d86 100644 (file)
@@ -1022,6 +1022,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
        ab->hif.ops = hif_ops;
        ab->pdev = pdev;
        ab->hw_rev = hw_rev;
+       ab->target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
        platform_set_drvdata(pdev, ab);
        ab_ahb = ath12k_ab_to_ahb(ab);
        ab_ahb->ab = ab;
index 53e60dba3bf87d1bd85da6ba3b86dcb7179d212b..bf46acb542682d5c20d2faab09d1e4f59e09f771 100644 (file)
@@ -1728,6 +1728,20 @@ static void ath12k_core_reset(struct work_struct *work)
        mutex_unlock(&ag->mutex);
 }
 
+enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab)
+{
+       unsigned long total_ram;
+       struct sysinfo si;
+
+       si_meminfo(&si);
+       total_ram = si.totalram * si.mem_unit;
+
+       if (total_ram < SZ_512M)
+               return ATH12K_QMI_MEMORY_MODE_LOW_512_M;
+
+       return ATH12K_QMI_MEMORY_MODE_DEFAULT;
+}
+
 int ath12k_core_pre_init(struct ath12k_base *ab)
 {
        const struct ath12k_mem_profile_based_param *param;
@@ -1739,7 +1753,7 @@ int ath12k_core_pre_init(struct ath12k_base *ab)
                return ret;
        }
 
-       param = &ath12k_mem_profile_based_param[ATH12K_QMI_MEMORY_MODE_DEFAULT];
+       param = &ath12k_mem_profile_based_param[ab->target_mem_mode];
        ab->profile_param = param;
        ath12k_fw_map(ab);
 
index 8638ba49dca4df41dad1d0779efb3d38aa5d67e5..3e55b7b89eaed2ce835f772162f956d31247861c 100644 (file)
@@ -1231,6 +1231,7 @@ struct ath12k_base {
        struct ath12k_reg_freq reg_freq_5ghz;
        struct ath12k_reg_freq reg_freq_6ghz;
        const struct ath12k_mem_profile_based_param *profile_param;
+       enum ath12k_qmi_mem_mode target_mem_mode;
 
        /* must be last */
        u8 drv_priv[] __aligned(sizeof(void *));
@@ -1365,6 +1366,7 @@ void ath12k_fw_stats_free(struct ath12k_fw_stats *stats);
 void ath12k_fw_stats_reset(struct ath12k *ar);
 struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab,
                                                  int index);
+enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab);
 
 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
 {
index 1f3cfd9b89fdcfd84731ec90c9c678b0c477a2af..b4e7e77518dd7750cac5b7da04e643aacc74680d 100644 (file)
@@ -1595,6 +1595,7 @@ static int ath12k_pci_probe(struct pci_dev *pdev,
                ab->hal_rx_ops = &hal_rx_qcn9274_ops;
                ath12k_pci_read_hw_version(ab, &soc_hw_version_major,
                                           &soc_hw_version_minor);
+               ab->target_mem_mode = ath12k_core_get_memory_mode(ab);
                switch (soc_hw_version_major) {
                case ATH12K_PCI_SOC_HW_VERSION_2:
                        ab->hw_rev = ATH12K_HW_QCN9274_HW20;
@@ -1618,6 +1619,7 @@ static int ath12k_pci_probe(struct pci_dev *pdev,
                ab->hal_rx_ops = &hal_rx_wcn7850_ops;
                ath12k_pci_read_hw_version(ab, &soc_hw_version_major,
                                           &soc_hw_version_minor);
+               ab->target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
                switch (soc_hw_version_major) {
                case ATH12K_PCI_SOC_HW_VERSION_2:
                        ab->hw_rev = ATH12K_HW_WCN7850_HW20;
index 5e8943060443d376d07305d48cfd2254b3636067..7c611a1fd6d07435adb399f921c37e15ec3c7837 100644 (file)
@@ -3856,7 +3856,7 @@ int ath12k_qmi_init_service(struct ath12k_base *ab)
        memset(&ab->qmi.target_mem, 0, sizeof(struct target_mem_chunk));
        ab->qmi.ab = ab;
 
-       ab->qmi.target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
+       ab->qmi.target_mem_mode = ab->target_mem_mode;
        ret = qmi_handle_init(&ab->qmi.handle, ATH12K_QMI_RESP_LEN_MAX,
                              &ath12k_qmi_ops, ath12k_qmi_msg_handlers);
        if (ret < 0) {