Add tests for FCOM/FCOMP instructions. BZ#212352.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15779

diff --git a/NEWS b/NEWS
index f3e65e2b9b6d4aac8bcb4a0baf937dea1cde9b7d..7afd8a7e36c05464c1f7d9ef28286c4896060d7f 100644 (file)
--- a/NEWS
+++ b/NEWS
@@ -46,6 +46,7 @@ To see details of a given bug, visit
 where XXXXXX is the bug number as listed below.
 
 191069  Exiting due to signal not reported in XML output
+212352  vex amd64 unhandled opc_aux = 0x 2, first_opcode == 0xDC (FCOM)
 278744  cvtps2pd with redundant RexW
 353083  arm64 doesn't implement various xattr system calls
 353084  arm64 doesn't support sigpending system call

diff --git a/none/tests/amd64/insn_fpu.def b/none/tests/amd64/insn_fpu.def
index c99815eee768018c7bdd8851c029b7a8272cd0ad..590f5844cebbf94a4f02007657dd34d3bf51fe4c 100644 (file)
--- a/none/tests/amd64/insn_fpu.def
+++ b/none/tests/amd64/insn_fpu.def
@@ -58,6 +58,18 @@ fiaddl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[88888888.7654321]
 fiaddl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[86419753.2345679]
 fiaddl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679]
 fiaddl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321]
+fcoms st0.ps[1234.5678] : m32.ps[1234.5676] => st0.ps[1234.5678] fpusw[0x4700,0x0000]
+fcoms st0.ps[1234.5678] : m32.ps[1234.5679] => st0.ps[1234.5678] fpusw[0x4700,0x0100]
+fcoms st0.ps[1234.5678] : m32.ps[1234.5678] => st0.ps[1234.5678] fpusw[0x4700,0x4000]
+fcoml st0.pd[1234567.7654321] : m64.pd[1234567.7654320] => st0.pd[1234567.7654321] fpusw[0x4700,0x0000]
+fcoml st0.pd[1234567.7654321] : m64.pd[1234567.7654322] => st0.pd[1234567.7654321] fpusw[0x4700,0x0100]
+fcoml st0.pd[1234567.7654321] : m64.pd[1234567.7654321] => st0.pd[1234567.7654321] fpusw[0x4700,0x4000]
+fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5676] => st0.ps[8765.4321] fpusw[0x4700,0x0000]
+fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5679] => st0.ps[8765.4321] fpusw[0x4700,0x0100]
+fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5678] => st0.ps[8765.4321] fpusw[0x4700,0x4000]
+fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654320] => st0.pd[7654321.1234567] fpusw[0x4700,0x0000]
+fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654322] => st0.pd[7654321.1234567] fpusw[0x4700,0x0100]
+fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654321] => st0.pd[7654321.1234567] fpusw[0x4700,0x4000]
 fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
 fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
 fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]

diff --git a/none/tests/amd64/insn_fpu.stdout.exp b/none/tests/amd64/insn_fpu.stdout.exp
index 2dbaa07ce06cdc477aa1c5457ddbf1ce78fc1edb..67128c13b7a544f6a6bcb3fef984acde371acda2 100644 (file)
--- a/none/tests/amd64/insn_fpu.stdout.exp
+++ b/none/tests/amd64/insn_fpu.stdout.exp
@@ -58,6 +58,18 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcoms_1 ... ok
+fcoms_2 ... ok
+fcoms_3 ... ok
+fcoml_1 ... ok
+fcoml_2 ... ok
+fcoml_3 ... ok
+fcomps_1 ... ok
+fcomps_2 ... ok
+fcomps_3 ... ok
+fcompl_1 ... ok
+fcompl_2 ... ok
+fcompl_3 ... ok
 fcomi_1 ... ok
 fcomi_2 ... ok
 fcomi_3 ... ok

diff --git a/none/tests/x86/insn_fpu.def b/none/tests/x86/insn_fpu.def
index c99815eee768018c7bdd8851c029b7a8272cd0ad..590f5844cebbf94a4f02007657dd34d3bf51fe4c 100644 (file)
--- a/none/tests/x86/insn_fpu.def
+++ b/none/tests/x86/insn_fpu.def
@@ -58,6 +58,18 @@ fiaddl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[88888888.7654321]
 fiaddl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[86419753.2345679]
 fiaddl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679]
 fiaddl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321]
+fcoms st0.ps[1234.5678] : m32.ps[1234.5676] => st0.ps[1234.5678] fpusw[0x4700,0x0000]
+fcoms st0.ps[1234.5678] : m32.ps[1234.5679] => st0.ps[1234.5678] fpusw[0x4700,0x0100]
+fcoms st0.ps[1234.5678] : m32.ps[1234.5678] => st0.ps[1234.5678] fpusw[0x4700,0x4000]
+fcoml st0.pd[1234567.7654321] : m64.pd[1234567.7654320] => st0.pd[1234567.7654321] fpusw[0x4700,0x0000]
+fcoml st0.pd[1234567.7654321] : m64.pd[1234567.7654322] => st0.pd[1234567.7654321] fpusw[0x4700,0x0100]
+fcoml st0.pd[1234567.7654321] : m64.pd[1234567.7654321] => st0.pd[1234567.7654321] fpusw[0x4700,0x4000]
+fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5676] => st0.ps[8765.4321] fpusw[0x4700,0x0000]
+fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5679] => st0.ps[8765.4321] fpusw[0x4700,0x0100]
+fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5678] => st0.ps[8765.4321] fpusw[0x4700,0x4000]
+fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654320] => st0.pd[7654321.1234567] fpusw[0x4700,0x0000]
+fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654322] => st0.pd[7654321.1234567] fpusw[0x4700,0x0100]
+fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654321] => st0.pd[7654321.1234567] fpusw[0x4700,0x4000]
 fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
 fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
 fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]

diff --git a/none/tests/x86/insn_fpu.stdout.exp b/none/tests/x86/insn_fpu.stdout.exp
index 2dbaa07ce06cdc477aa1c5457ddbf1ce78fc1edb..67128c13b7a544f6a6bcb3fef984acde371acda2 100644 (file)
--- a/none/tests/x86/insn_fpu.stdout.exp
+++ b/none/tests/x86/insn_fpu.stdout.exp
@@ -58,6 +58,18 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcoms_1 ... ok
+fcoms_2 ... ok
+fcoms_3 ... ok
+fcoml_1 ... ok
+fcoml_2 ... ok
+fcoml_3 ... ok
+fcomps_1 ... ok
+fcomps_2 ... ok
+fcomps_3 ... ok
+fcompl_1 ... ok
+fcompl_2 ... ok
+fcompl_3 ... ok
 fcomi_1 ... ok
 fcomi_2 ... ok
 fcomi_3 ... ok