i386: Handle ZERO_EXTEND like SIGN_EXTEND in bsr patterns [PR120434]

The just posted second PR120434 patch causes
+FAIL: gcc.target/i386/pr78103-3.c scan-assembler \\\\m(leaq|addq|incq)\\\\M
+FAIL: gcc.target/i386/pr78103-3.c scan-assembler-not \\\\mmovl\\\\M+
+FAIL: gcc.target/i386/pr78103-3.c scan-assembler-not \\\\msubq\\\\M
+FAIL: gcc.target/i386/pr78103-3.c scan-assembler-not \\\\mxor[lq]\\\\M
While the patch generally improves code generation by often using
ZERO_EXTEND instead of SIGN_EXTEND, where the former is often for free
on x86_64 while the latter requires an extra instruction or larger
instruction than one with just zero extend, the PR78103 combine patterns
and splitters were written only with SIGN_EXTEND in mind.  As CLZ is UB
on 0 and otherwise returns just [0,63] and is xored with 63, ZERO_EXTEND
does the same thing there as SIGN_EXTEND.

2025-06-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/120434
	* config/i386/i386.md (*bsr_rex64_2): Rename to ...
	(*bsr_rex64<u>_2): ... this.  Use any_extend instead of sign_extend.
	(*bsr_2): Rename to ...
	(*bsr<u>_2): ... this.  Use any_extend instead of sign_extend.
	(bsr splitters after those): Use any_extend instead of sign_extend.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 8eee44756eba707790d937afc1bbc97843c9819a..99f3824971486254316585b2fe54ec375b274e78 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -21512,11 +21512,12 @@
    (set_attr "mode" "SI")])
 
 ; As bsr is undefined behavior on zero and for other input
-; values it is in range 0 to 63, we can optimize away sign-extends.
-(define_insn_and_split "*bsr_rex64_2"
+; values it is in range 0 to 63, we can optimize away sign-extends
+; or zero-extends.
+(define_insn_and_split "*bsr_rex64<u>_2"
   [(set (match_operand:DI 0 "register_operand")
        (xor:DI
-         (sign_extend:DI
+         (any_extend:DI
            (minus:SI
              (const_int 63)
              (subreg:SI (clz:DI (match_operand:DI 1 "nonimmediate_operand"))
@@ -21538,9 +21539,9 @@
   operands[3] = lowpart_subreg (SImode, operands[2], DImode);
 })
 
-(define_insn_and_split "*bsr_2"
+(define_insn_and_split "*bsr<u>_2"
   [(set (match_operand:DI 0 "register_operand")
-       (sign_extend:DI
+       (any_extend:DI
          (xor:SI
            (minus:SI
              (const_int 31)
@@ -21617,7 +21618,7 @@
        (minus:DI
          (match_operand:DI 2 "const_int_operand")
          (xor:DI
-           (sign_extend:DI
+           (any_extend:DI
              (minus:SI (const_int 63)
                        (subreg:SI
                          (clz:DI (match_operand:DI 1 "nonimmediate_operand"))
@@ -21647,7 +21648,7 @@
   [(set (match_operand:DI 0 "register_operand")
        (minus:DI
          (match_operand:DI 2 "const_int_operand")
-         (sign_extend:DI
+         (any_extend:DI
            (xor:SI
              (minus:SI (const_int 31)
                        (clz:SI (match_operand:SI 1 "nonimmediate_operand")))