media: verisilicon: av1: Store chroma and mv offsets

Store the chroma and motion vector offsets for each frame so that they
can be used later when the resolution changes.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h
index 14fc6a3e287819feb7efcbca7d960ff71ed4eaba..edc217eed293734ddd970766495f944f1a163d69 100644 (file)
--- a/drivers/media/platform/verisilicon/hantro.h
+++ b/drivers/media/platform/verisilicon/hantro.h
@@ -334,12 +334,19 @@ struct hantro_vp9_decoded_buffer_info {
        u32 bit_depth : 4;
 };
 
+struct hantro_av1_decoded_buffer_info {
+       /* Info needed when the decoded frame serves as a reference frame. */
+       size_t chroma_offset;
+       size_t mv_offset;
+};
+
 struct hantro_decoded_buffer {
        /* Must be the first field in this struct. */
        struct v4l2_m2m_buffer base;
 
        union {
                struct hantro_vp9_decoded_buffer_info vp9;
+               struct hantro_av1_decoded_buffer_info av1;
        };
 };
 

diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
index e54f5fac325bd6e1f1f8d5cfb188537a8758b6b4..69b5d9e12926fb408c08f8ba2139d05ba44389b7 100644 (file)
--- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
@@ -686,8 +686,6 @@ rockchip_vpu981_av1_dec_set_ref(struct hantro_ctx *ctx, int ref, int idx,
        struct hantro_dev *vpu = ctx->dev;
        struct hantro_decoded_buffer *dst;
        dma_addr_t luma_addr, chroma_addr, mv_addr = 0;
-       size_t cr_offset = rockchip_vpu981_av1_dec_luma_size(ctx);
-       size_t mv_offset = rockchip_vpu981_av1_dec_chroma_size(ctx);
        int cur_width = frame->frame_width_minus_1 + 1;
        int cur_height = frame->frame_height_minus_1 + 1;
        int scale_width =
@@ -744,8 +742,8 @@ rockchip_vpu981_av1_dec_set_ref(struct hantro_ctx *ctx, int ref, int idx,
 
        dst = vb2_to_hantro_decoded_buf(&av1_dec->frame_refs[idx].vb2_ref->vb2_buf);
        luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf);
-       chroma_addr = luma_addr + cr_offset;
-       mv_addr = luma_addr + mv_offset;
+       chroma_addr = luma_addr + dst->av1.chroma_offset;
+       mv_addr = luma_addr + dst->av1.mv_offset;
 
        hantro_write_addr(vpu, AV1_REFERENCE_Y(ref), luma_addr);
        hantro_write_addr(vpu, AV1_REFERENCE_CB(ref), chroma_addr);
@@ -2089,6 +2087,9 @@ rockchip_vpu981_av1_dec_set_output_buffer(struct hantro_ctx *ctx)
        chroma_addr = luma_addr + cr_offset;
        mv_addr = luma_addr + mv_offset;
 
+       dst->av1.chroma_offset = cr_offset;
+       dst->av1.mv_offset = mv_offset;
+
        hantro_write_addr(vpu, AV1_TILE_OUT_LU, luma_addr);
        hantro_write_addr(vpu, AV1_TILE_OUT_CH, chroma_addr);
        hantro_write_addr(vpu, AV1_TILE_OUT_MV, mv_addr);