Valgrind regression test fix for stfdpx instruction.

There is a bug in the stfdpx instruction test for ppc32 and ppc64.
The inline assembly to move the arguments into the registers before
the store instruction were moving from the register not to the
register.  The error has been fixed.  This results in a change in
the expected output.

Additionally, it was noted that the inline assembly was using "f" rather
then "d" for the double arguments.  Similarly, the prints should have
been %lf not %f for doubles.  These changes were made but they did not
change the output of the tests.

This patch fixes Vagrind bugzilla 339020.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14545

diff --git a/memcheck/tests/ppc32/power_ISA2_05.c b/memcheck/tests/ppc32/power_ISA2_05.c
index 3736c274ad8354b33bbbef9666bf0cf86a6f5492..e57b9293b06daaab4a8afb6dbcd814c2c15d313b 100644 (file)
--- a/memcheck/tests/ppc32/power_ISA2_05.c
+++ b/memcheck/tests/ppc32/power_ISA2_05.c
@@ -92,18 +92,18 @@ void test_double_pair_instrs()
    }
 
    __asm__ volatile ("lfdp 10, %0"::"m" (dbl_pair[0]));
-   __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
-   __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
-   printf("lfdp (%f, %f) => F_hi=%f, F_lo=%f\n",
+   __asm__ volatile ("fmr %0, 10":"=d" (FRT1));
+   __asm__ volatile ("fmr %0, 11":"=d" (FRT2));
+   printf("lfdp (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           dbl_pair[0].hi, dbl_pair[0].lo, FRT1, FRT2);
 
 
    FRT1 = 2.2048;
    FRT2 = -4.1024;
-   __asm__ volatile ("fmr 10, %0"::"f" (FRT1));
-   __asm__ volatile ("fmr 11, %0"::"f" (FRT2));
+   __asm__ volatile ("fmr 10, %0"::"d" (FRT1));
+   __asm__ volatile ("fmr 11, %0"::"d" (FRT2));
    __asm__ volatile ("stfdp 10, %0"::"m" (dbl_pair[1]));
-   printf("stfdp (%f, %f) => F_hi=%f, F_lo=%f\n",
+   printf("stfdp (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           FRT1, FRT2, dbl_pair[1].hi, dbl_pair[1].lo);
 
    FRT1 = 0.0;
@@ -113,9 +113,9 @@ void test_double_pair_instrs()
    __asm__ volatile ("ori 20, %0, 0"::"r" (base));
    __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("lfdpx 10, 20, 21");
-   __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
-   __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
-   printf("lfdpx (%f, %f) => F_hi=%f, F_lo=%f\n",
+   __asm__ volatile ("fmr %0, 10":"=d" (FRT1));
+   __asm__ volatile ("fmr %0, 11":"=d" (FRT2));
+   printf("lfdpx (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           dbl_pair[1].hi, dbl_pair[1].lo, FRT1, FRT2);
 
    FRT1 = 8.2048;
@@ -124,10 +124,10 @@ void test_double_pair_instrs()
    offset = (unsigned long) &dbl_pair[2] - base;
    __asm__ volatile ("ori 20, %0, 0"::"r" (base));
    __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
-   __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
-   __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
+   __asm__ volatile ("fmr 10, %0 "::"d" (FRT1));
+   __asm__ volatile ("fmr 11, %0 "::"d" (FRT2));
    __asm__ volatile ("stfdpx 10, 20, 21");
-   printf("stfdpx (%f, %f) => F_hi=%f, F_lo=%f\n",
+   printf("stfdpx (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           FRT1, FRT2, dbl_pair[2].hi, dbl_pair[2].lo);
 #endif
 }

diff --git a/memcheck/tests/ppc32/power_ISA2_05.stdout.exp b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp
index e4975fb4e1e373d6a5a26809b5f84bd85661c8f6..75ac3ebe8f78d650374c0ca7c2132c1e3ddf7d44 100644 (file)
--- a/memcheck/tests/ppc32/power_ISA2_05.stdout.exp
+++ b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp
@@ -18,7 +18,7 @@ fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
 lfdp (-1024.000000, 1025.000000) => F_hi=-1024.000000, F_lo=1025.000000
 stfdp (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
 lfdpx (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
-stfdpx (2.204800, 2.204800) => F_hi=2.204800, F_lo=2.204800
+stfdpx (8.204800, -16.102400) => F_hi=8.204800, F_lo=-16.102400
 lfiwax (-1024.000000) => FRT=(ffffffff, c0900000)
 prtyw (0) => parity=0
 prtyw (1) => parity=1

diff --git a/memcheck/tests/ppc64/power_ISA2_05.c b/memcheck/tests/ppc64/power_ISA2_05.c
index 5583d35d55a9c465e1b272012b85e91217a49836..edd2a558f4282e447c5ec5b26e667688e4d5b4a3 100644 (file)
--- a/memcheck/tests/ppc64/power_ISA2_05.c
+++ b/memcheck/tests/ppc64/power_ISA2_05.c
@@ -97,18 +97,18 @@ void test_double_pair_instrs()
    }
 
    __asm__ volatile ("lfdp 10, %0"::"m" (dbl_pair[0]));
-   __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
-   __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
-   printf("lfdp (%f, %f) => F_hi=%f, F_lo=%f\n",
+   __asm__ volatile ("fmr %0, 10":"=d" (FRT1));
+   __asm__ volatile ("fmr %0, 11":"=d" (FRT2));
+   printf("lfdp (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           dbl_pair[0].hi, dbl_pair[0].lo, FRT1, FRT2);
 
 
    FRT1 = 2.2048;
    FRT2 = -4.1024;
-   __asm__ volatile ("fmr 10, %0"::"f" (FRT1));
-   __asm__ volatile ("fmr 11, %0"::"f" (FRT2));
+   __asm__ volatile ("fmr 10, %0"::"d" (FRT1));
+   __asm__ volatile ("fmr 11, %0"::"d" (FRT2));
    __asm__ volatile ("stfdp 10, %0"::"m" (dbl_pair[1]));
-   printf("stfdp (%f, %f) => F_hi=%f, F_lo=%f\n",
+   printf("stfdp (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           FRT1, FRT2, dbl_pair[1].hi, dbl_pair[1].lo);
 
    FRT1 = 0.0;
@@ -118,9 +118,9 @@ void test_double_pair_instrs()
    __asm__ volatile ("ori 20, %0, 0"::"r" (base));
    __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("lfdpx 10, 20, 21");
-   __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
-   __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
-   printf("lfdpx (%f, %f) => F_hi=%f, F_lo=%f\n",
+   __asm__ volatile ("fmr %0, 10":"=d" (FRT1));
+   __asm__ volatile ("fmr %0, 11":"=d" (FRT2));
+   printf("lfdpx (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           dbl_pair[1].hi, dbl_pair[1].lo, FRT1, FRT2);
 
    FRT1 = 8.2048;
@@ -129,10 +129,10 @@ void test_double_pair_instrs()
    offset = (unsigned long) &dbl_pair[2] - base;
    __asm__ volatile ("ori 20, %0, 0"::"r" (base));
    __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
-   __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
-   __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
+   __asm__ volatile ("fmr 10, %0 "::"d" (FRT1));
+   __asm__ volatile ("fmr 11, %0 "::"d" (FRT2));
    __asm__ volatile ("stfdpx 10, 20, 21");
-   printf("stfdpx (%f, %f) => F_hi=%f, F_lo=%f\n",
+   printf("stfdpx (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
           FRT1, FRT2, dbl_pair[2].hi, dbl_pair[2].lo);
 #endif
 }

diff --git a/memcheck/tests/ppc64/power_ISA2_05.stdout.exp b/memcheck/tests/ppc64/power_ISA2_05.stdout.exp
index a87e75b8b069c8acf26ab141ff755169f848f429..7a851dbf20f8ff9b8b9a227c884f64fb2914cecd 100644 (file)
--- a/memcheck/tests/ppc64/power_ISA2_05.stdout.exp
+++ b/memcheck/tests/ppc64/power_ISA2_05.stdout.exp
@@ -19,7 +19,7 @@ fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
 lfdp (-1024.000000, 1025.000000) => F_hi=-1024.000000, F_lo=1025.000000
 stfdp (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
 lfdpx (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
-stfdpx (2.204800, 2.204800) => F_hi=2.204800, F_lo=2.204800
+stfdpx (8.204800, -16.102400) => F_hi=8.204800, F_lo=-16.102400
 lfiwax (-1024.000000) => FRT=(ffffffff, c4800000)
 prtyd (0) => parity=0
 prtyw (0) => parity=0