},
};
+static struct str_num_map pin_operstate_map[] = {
+ { .str = "active", .num = DPLL_PIN_OPERSTATE_ACTIVE },
+ { .str = "standby", .num = DPLL_PIN_OPERSTATE_STANDBY },
+ { .str = "no-signal", .num = DPLL_PIN_OPERSTATE_NO_SIGNAL },
+ { .str = "qual-failed", .num = DPLL_PIN_OPERSTATE_QUAL_FAILED },
+ {
+ .str = NULL,
+ },
+};
+
static struct str_num_map pin_type_map[] = {
{ .str = "mux", .num = DPLL_PIN_TYPE_MUX },
{ .str = "ext", .num = DPLL_PIN_TYPE_EXT },
return 0;
}
+static int str_to_dpll_pin_operstate(const char *str, __u32 *operstate)
+{
+ int num;
+
+ num = str_map_lookup_str(pin_operstate_map, str);
+ if (num < 0)
+ return num;
+ *operstate = num;
+ return 0;
+}
+
static int str_to_dpll_pin_direction(const char *dir_str, __u32 *direction)
{
int num;
#define DPLL_FILTER_PIN_PARENT_PIN BIT(7)
#define DPLL_FILTER_PIN_DIRECTION BIT(8)
#define DPLL_FILTER_PIN_STATE BIT(9)
+#define DPLL_FILTER_PIN_OPERSTATE BIT(10)
struct dpll_pin_filter {
uint64_t present;
__u32 parent_pin_id;
__u32 direction;
__u32 state;
+ __u32 operstate;
};
static bool filter_match_nested_id(const struct nlmsghdr *nlh,
filter->state))
continue;
+ if ((filter->present & DPLL_FILTER_PIN_OPERSTATE) &&
+ !filter_match_u32(tb_nest[DPLL_A_PIN_OPERSTATE],
+ filter->operstate))
+ continue;
+
return true;
}
return false;
return false;
if ((filter->present & (DPLL_FILTER_PIN_PARENT_DEVICE |
DPLL_FILTER_PIN_DIRECTION |
- DPLL_FILTER_PIN_STATE)) &&
+ DPLL_FILTER_PIN_STATE |
+ DPLL_FILTER_PIN_OPERSTATE)) &&
!filter_match_nested_parent_device(nlh, filter))
return false;
if ((filter->present & DPLL_FILTER_PIN_PARENT_PIN) &&
return str ? str : "unknown";
}
+static const char *dpll_pin_operstate_name(__u32 operstate)
+{
+ const char *str;
+
+ str = str_map_lookup_uint(pin_operstate_map, operstate);
+ return str ? str : "unknown";
+}
+
static const char *dpll_pin_direction_name(__u32 direction)
{
const char *str;
" prio %u");
DPLL_PR_ENUM_STR_FMT(tb_parent, DPLL_A_PIN_STATE, "state",
" state %s", dpll_pin_state_name);
+ DPLL_PR_ENUM_STR_FMT(tb_parent, DPLL_A_PIN_OPERSTATE,
+ "operstate", " operstate %s",
+ dpll_pin_operstate_name);
dpll_pr_phase_offset(tb_parent[DPLL_A_PIN_PHASE_OFFSET]);
print_nl();
str_to_dpll_pin_state,
"connected/disconnected/selectable"))
return -EINVAL;
+ } else if (dpll_argv_match(dpll, "operstate")) {
+ if (dpll_filter_parse_enum(dpll, "operstate",
+ &filter.operstate,
+ &filter.present,
+ DPLL_FILTER_PIN_OPERSTATE,
+ str_to_dpll_pin_operstate,
+ "active/standby/no-signal/qual-failed"))
+ return -EINVAL;
} else {
pr_err("unknown option: %s\n", dpll_argv(dpll));
return -EINVAL;
.SH PIN COMMANDS
-.SS dpll pin show [ id ID ] [ parent-device DEVICE_ID ] [ parent-pin PIN_ID ] [ module-name NAME ] [ clock-id ID ] [ board-label LABEL ] [ panel-label LABEL ] [ package-label LABEL ] [ type TYPE ] [ direction DIR ] [ state STATE ]
+.SS dpll pin show [ id ID ] [ parent-device DEVICE_ID ] \
+[ parent-pin PIN_ID ] [ module-name NAME ] [ clock-id ID ] \
+[ board-label LABEL ] [ panel-label LABEL ] [ package-label LABEL ] \
+[ type TYPE ] [ direction DIR ] [ state STATE ] [ operstate OPERSTATE ]
Display information about DPLL pins. If no arguments are specified,
shows all pins in the system.
.BR parent-device ,
only the specified parent-device relationship is checked.
+.TP
+.BI operstate " OPERSTATE"
+Show only pins that have a parent-device relationship with the specified
+operational state:
+.BR active ", " standby ", " no-signal ", " qual-failed .
+When combined with
+.BR parent-device ,
+only the specified parent-device relationship is checked.
+
.PP
Output includes:
.RS
.IP \[bu]
Phase adjustment range, granularity, and current value
.IP \[bu]
-Parent device relationships (direction, priority, state, phase offset)
+Parent device relationships (direction, priority, state, operstate, phase offset)
.IP \[bu]
Parent pin relationships
.IP \[bu]