RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute...

Reported-by: huangcunjian <huangcunjian.huang@alibaba-inc.com>
gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_gpr_save_operation_p): Remove
	break and fixbug for elt index.

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index fd51472dbeaa4d60ba2655f03b795e20df9f6543..b2794252291e6e7d551d72dae2cf01e20bc5700c 100644 (file)
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -11580,11 +11580,10 @@ riscv_gpr_save_operation_p (rtx op)
          /* Two CLOBBER and USEs, must check the order.  */
          unsigned expect_code = i < 3 ? CLOBBER : USE;
          if (GET_CODE (elt) != expect_code
-             || !REG_P (XEXP (elt, 1))
-             || (REGNO (XEXP (elt, 1)) != gpr_save_reg_order[i]))
+             || !REG_P (XEXP (elt, 0))
+             || (REGNO (XEXP (elt, 0)) != gpr_save_reg_order[i]))
            return false;
        }
-       break;
     }
   return true;
 }