spi: add multi_lane_mode field to struct spi_transfer

Add a new multi_lane_mode field to struct spi_transfer to allow
peripherals that support multiple SPI lanes to be used with a single
SPI controller.

This requires both the peripheral and the controller to have multiple
serializers connected to separate data lanes. It could also be used with
a single controller and multiple peripherals that are functioning as a
single logical device (similar to parallel memories).

Acked-by: Nuno Sá <nuno.sa@analog.com>
Acked-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-4-12af183c06eb@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 9fc5a9c012e2716bc7834148abe600fefc16b834..39681f7e063b8fe54e8a8d207836d6d60db7c2e1 100644 (file)
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -981,6 +981,8 @@ struct spi_res {
  *      (SPI_NBITS_SINGLE) is used.
  * @rx_nbits: number of bits used for reading. If 0 the default
  *      (SPI_NBITS_SINGLE) is used.
+ * @multi_lane_mode: How to serialize data on multiple lanes. One of the
+ *      SPI_MULTI_LANE_MODE_* values.
  * @len: size of rx and tx buffers (in bytes)
  * @speed_hz: Select a speed other than the device default for this
  *      transfer. If 0 the default (from @spi_device) is used.
@@ -1117,6 +1119,12 @@ struct spi_transfer {
        unsigned        cs_change:1;
        unsigned        tx_nbits:4;
        unsigned        rx_nbits:4;
+
+#define SPI_MULTI_LANE_MODE_SINGLE     0 /* only use single lane */
+#define SPI_MULTI_LANE_MODE_STRIPE     1 /* one data word per lane */
+#define SPI_MULTI_LANE_MODE_MIRROR     2 /* same word sent on all lanes */
+       unsigned        multi_lane_mode: 2;
+
        unsigned        timestamped:1;
        bool            dtr_mode;
 #define        SPI_NBITS_SINGLE        0x01 /* 1-bit transfer */