arm64: dts: freescale: imx93-var-som: Add support for ADS7846 touchscreen

The VAR-SOM-MX93 integrates an ADS7846 resistive touchscreen controller.
The controller is physically located on the SOM, and its signals are
routed to the SOM pins, allowing carrier boards to make use of it.

This patch adds the ADS7846 node and the appropriate SPI controller.

Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
index 0b7f6740e5adee6c58867b81603b763fcabcc5cc..2dc8b18ae91e5ca1ed188b7bf19b36f40e39cb68 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi
@@ -212,6 +212,38 @@
        };
 };
 
+&lpspi8 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpspi8>;
+       cs-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       /* Resistive touch controller */
+       ads7846: touchscreen@0 {
+               compatible = "ti,ads7846";
+               reg = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_restouch>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
+               spi-max-frequency = <1000000>;
+               pendown-gpio = <&gpio4 29 0>;
+               vcc-supply = <&buck5>;
+               ti,x-min = /bits/ 16 <125>;
+               ti,x-max = /bits/ 16 <4008>;
+               ti,y-min = /bits/ 16 <282>;
+               ti,y-max = /bits/ 16 <3864>;
+               ti,x-plate-ohms = /bits/ 16 <180>;
+               ti,pressure-max = /bits/ 16 <255>;
+               ti,debounce-max = /bits/ 16 <10>;
+               ti,debounce-tol = /bits/ 16 <3>;
+               ti,debounce-rep = /bits/ 16 <1>;
+               ti,settle-delay-usec = /bits/ 16 <150>;
+               ti,keep-vref-on;
+               wakeup-source;
+       };
+};
+
 /* BT module */
 &lpuart5 {
        pinctrl-names = "default";
@@ -307,6 +339,15 @@
                >;
        };
 
+       pinctrl_lpspi8: lpspi8grp {
+               fsl,pins = <
+                       MX93_PAD_GPIO_IO12__GPIO2_IO12          0x31e
+                       MX93_PAD_GPIO_IO13__LPSPI8_SIN          0x31e
+                       MX93_PAD_GPIO_IO14__LPSPI8_SOUT         0x31e
+                       MX93_PAD_GPIO_IO15__LPSPI8_SCK          0x31e
+               >;
+       };
+
        pinctrl_lpuart5: lpuart5grp {
                fsl,pins = <
                        MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX   0x31e
@@ -316,6 +357,12 @@
                >;
        };
 
+       pinctrl_restouch: restouchgrp {
+               fsl,pins = <
+                       MX93_PAD_CCM_CLKO4__GPIO4_IO29          0x31e
+               >;
+       };
+
        pinctrl_sai1: sai1grp {
                fsl,pins = <
                        MX93_PAD_SAI1_TXC__SAI1_TX_BCLK         0x31e