ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &test_dev));
/* Test for clk_get_by_id() */
- ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_ECSPI_ROOT), &clk);
ut_assertok(ret);
ut_asserteq_str("ecspi_root", clk->dev->name);
ut_asserteq(CLK_SET_RATE_PARENT, clk->flags);
/* Test for clk_get_parent_rate() */
- ret = clk_get_by_id(SANDBOX_CLK_ECSPI1, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_ECSPI1), &clk);
ut_assertok(ret);
ut_asserteq_str("ecspi1", clk->dev->name);
ut_asserteq(CLK_SET_RATE_PARENT, clk->flags);
ut_asserteq(rate, 20000000);
/* test the gate of CCF */
- ret = clk_get_by_id(SANDBOX_CLK_ECSPI0, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_ECSPI0), &clk);
ut_assertok(ret);
ut_asserteq_str("ecspi0", clk->dev->name);
ut_asserteq(CLK_SET_RATE_PARENT, clk->flags);
ut_asserteq(rate, 20000000);
/* Test the mux of CCF */
- ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_USDHC1_SEL), &clk);
ut_assertok(ret);
ut_asserteq_str("usdhc1_sel", clk->dev->name);
ut_asserteq(CLK_SET_RATE_NO_REPARENT, clk->flags);
rate = clk_get_rate(clk);
ut_asserteq(rate, 60000000);
- ret = clk_get_by_id(SANDBOX_CLK_PLL3_80M, &pclk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_PLL3_80M), &pclk);
ut_assertok(ret);
ret = clk_set_parent(clk, pclk);
rate = clk_get_rate(clk);
ut_asserteq(rate, 80000000);
- ret = clk_get_by_id(SANDBOX_CLK_USDHC2_SEL, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_USDHC2_SEL), &clk);
ut_assertok(ret);
ut_asserteq_str("usdhc2_sel", clk->dev->name);
ut_asserteq(CLK_SET_RATE_NO_REPARENT, clk->flags);
rate = clk_get_rate(clk);
ut_asserteq(rate, 80000000);
- ret = clk_get_by_id(SANDBOX_CLK_PLL3_60M, &pclk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_PLL3_60M), &pclk);
ut_assertok(ret);
ret = clk_set_parent(clk, pclk);
ut_asserteq(rate, 60000000);
/* Test the composite of CCF */
- ret = clk_get_by_id(SANDBOX_CLK_I2C, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_I2C), &clk);
ut_assertok(ret);
ut_asserteq_str("i2c", clk->dev->name);
ut_asserteq(CLK_SET_RATE_UNGATE, clk->flags);
ret = clk_get_by_index(test_dev, SANDBOX_CLK_TEST_ID_I2C_ROOT, &clk_ccf);
ut_assertok(ret);
ut_asserteq_str("clk-ccf", clk_ccf.dev->name);
- ut_asserteq(clk_ccf.id, SANDBOX_CLK_I2C_ROOT);
+ ut_asserteq(clk_ccf.id, CLK_ID(clk_ccf.dev, SANDBOX_CLK_I2C_ROOT));
- ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_I2C_ROOT), &clk);
ut_assertok(ret);
ut_asserteq_str("i2c_root", clk->dev->name);
- ut_asserteq(clk->id, SANDBOX_CLK_I2C_ROOT);
+ ut_asserteq(clk_get_id(clk), SANDBOX_CLK_I2C_ROOT);
ret = clk_enable(&clk_ccf);
ut_assertok(ret);
ret = sandbox_clk_enable_count(clk);
ut_asserteq(ret, 1);
- ret = clk_get_by_id(SANDBOX_CLK_I2C, &pclk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_I2C), &pclk);
ut_assertok(ret);
ret = sandbox_clk_enable_count(pclk);
ut_asserteq(ret, 0);
/* Test clock re-parenting. */
- ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_USDHC1_SEL), &clk);
ut_assertok(ret);
ut_asserteq_str("usdhc1_sel", clk->dev->name);
clkid = SANDBOX_CLK_PLL3_60M;
}
- ret = clk_get_by_id(clkid, &pclk);
+ ret = clk_get_by_id(CLK_ID(dev, clkid), &pclk);
ut_assertok(ret);
ret = clk_set_parent(clk, pclk);
ut_assertok(ret);
ut_asserteq_str(clkname, pclk->dev->name);
/* Test disabling critical clock. */
- ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk);
+ ret = clk_get_by_id(CLK_ID(dev, SANDBOX_CLK_I2C_ROOT), &clk);
ut_assertok(ret);
ut_asserteq_str("i2c_root", clk->dev->name);