RISC-V: revert pr114194 tests on gcc-14 [PR118601]

The gcc-14 backport that split the pr114194 testcase for rv32 and rv64
would only generate the expected rv32 sequence if commit
6b315907c0353f71169a7555e653d29a981fef67 had also been backported, but
it wasn't.  Without it, we get the same code as before on both rv32
and rv64, so revert to the original test.

for  gcc/testsuite/ChangeLog

	PR target/118601
	* gcc.target/riscv/rvv/xtheadvector/pr114194.c: Restore.
	* gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c: Remove.
	* gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c
deleted file mode 100644 (file)
index 0bee5ec..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* { dg-do compile { target rv32 } } */
-/* { dg-options "-march=rv32gc_xtheadvector -O2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo0_1:
-**     sb\tzero,0\([a-x0-9]+\)
-**     ret
-*/
-void foo0_1 (void *p)
-{
-  __builtin_memset (p, 0, 1);
-}
-
-/*
-** foo0_7:
-**     li\t[a-x0-9]+,7
-**     th.vsetvli\tzero,[a-x0-9]+,e8,m1
-**     th\.vmv\.v\.i\tv[0-9],0
-**     th\.vse\.v\tv[0-9]+,0\([a-x0-9]+\)
-**     ret
-*/
-void foo0_7 (void *p)
-{
-  __builtin_memset (p, 0, 7);
-}
-
-/*
-** foo1_1:
-**     li\t[a-x0-9]+,1
-**     sb\t[a-x0-9]+,0\([a-x0-9]+\)
-**     ret
-*/
-void foo1_1 (void *p)
-{
-  __builtin_memset (p, 1, 1);
-}
-
-/*
-** foo1_5:
-**     li\t[a-x0-9]+,5
-**     th.vsetvli\tzero,[a-x0-9]+,e8,m1
-**     th\.vmv\.v\.i\tv[0-9],1
-**     th\.vse\.v\tv[0-9]+,0\([a-x0-9]+\)
-**     ret
-*/
-
-void foo1_5 (void *p)
-{
-  __builtin_memset (p, 1, 5);
-}

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194.c
similarity index 82%
rename from gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c
rename to gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194.c
index 84333c1cf5a7c20817d665152e778140e6bea634..2e53a7ecc3e71cd6dc09cf2437ef535cc9d484d9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target rv64 } } */
-/* { dg-options "-march=rv64gc_xtheadvector -O2" } */
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_xtheadvector -O2" { target { rv32 } } } */
+/* { dg-options "-march=rv64gc_xtheadvector -O2" { target { rv64 } } } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
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