* config/arm/arm.c (all_fpus): Fix comment typo.
* config/darwin.c: Likewise.
* config/frv/frv.h (FRV_STRUCT_VALUE_REGNUM): Likewise.
* config/h8300/h8300.md (extendqisi2_h8300hs): Likewise.
* config/m68hc11/m68hc11.c (m68hc11_reload_operands): Likewise.
From-SVN: r109238
+2006-01-02 Volker Reichelt <reichelt@igpm.rwth-aachen.de>
+
+ * config/arm/arm.c (all_fpus): Fix comment typo.
+ * config/darwin.c: Likewise.
+ * config/frv/frv.h (FRV_STRUCT_VALUE_REGNUM): Likewise.
+ * config/h8300/h8300.md (extendqisi2_h8300hs): Likewise.
+ * config/m68hc11/m68hc11.c (m68hc11_reload_operands): Likewise.
+
2006-01-01 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.c (rs6000_expand_compare_and_swapqhi): New.
};
-/* Available values for for -mfpu=. */
+/* Available values for -mfpu=. */
static const struct fpu_desc all_fpus[] =
{
able to do easily. These changes allow gdb to load in
recompilation of a translation unit that has been changed into a
running program and replace existing functions and methods of that
- translation unit with with versions of those functions and methods
+ translation unit with versions of those functions and methods
from the newly compiled translation unit. The new functions access
the existing static symbols from the old translation unit, if the
symbol existed in the unit to be replaced, and from the new
\f
/* How Large Values are Returned. */
-/* The number of the register that is used to to pass the structure
+/* The number of the register that is used to pass the structure
value address. */
#define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
[(set_attr "length" "8,12")])
;; The following pattern is needed because without the pattern, the
-;; combiner would split (sign_extend:SI (reg:QI)) into into two 24-bit
+;; combiner would split (sign_extend:SI (reg:QI)) into two 24-bit
;; shifts, one ashift and one ashiftrt.
(define_insn_and_split "*extendqisi2_h8300hs"
}
/* If the offset is out of range, we have to compute the address
- with a separate add instruction. We try to do with with an 8-bit
+ with a separate add instruction. We try to do this with an 8-bit
add on the A register. This is possible only if the lowest part
of the offset (i.e., big_offset % 256) is a valid constant offset
with respect to the mode. If it's not, we have to generate a