]> git.ipfire.org Git - thirdparty/valgrind.git/commitdiff
Add test cases for amd64 ADC Iv, eAX and SBB Iv, eAX (Jakub Jelinek,
authorJulian Seward <jseward@acm.org>
Tue, 28 Sep 2010 14:39:39 +0000 (14:39 +0000)
committerJulian Seward <jseward@acm.org>
Tue, 28 Sep 2010 14:39:39 +0000 (14:39 +0000)
jakub@redhat.com).  See #211410.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11385

none/tests/amd64/Makefile.am
none/tests/amd64/sbbmisc.c [new file with mode: 0644]
none/tests/amd64/sbbmisc.stderr.exp [new file with mode: 0644]
none/tests/amd64/sbbmisc.stdout.exp [new file with mode: 0644]
none/tests/amd64/sbbmisc.vgtest [new file with mode: 0644]
none/tests/x86/sbbmisc.c
none/tests/x86/sbbmisc.stdout.exp

index bd1c8a7120703e38451a5967f6e5db3743778086..0928d568a1a5d500a02645db16067c0b52141918 100644 (file)
@@ -47,6 +47,7 @@ EXTRA_DIST = \
        redundantRexW.vgtest redundantRexW.stdout.exp \
        redundantRexW.stderr.exp \
        smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
+       sbbmisc.stderr.exp sbbmisc.stdout.exp sbbmisc.vgtest \
        shrld.stderr.exp shrld.stdout.exp shrld.vgtest \
        ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
        ssse3_misaligned.vgtest \
@@ -63,6 +64,7 @@ check_PROGRAMS = \
        rcl-amd64 \
        redundantRexW \
        smc1 \
+       sbbmisc \
        nibz_bennee_mmap \
        xadd
 if BUILD_SSSE3_TESTS
diff --git a/none/tests/amd64/sbbmisc.c b/none/tests/amd64/sbbmisc.c
new file mode 100644 (file)
index 0000000..ef542fa
--- /dev/null
@@ -0,0 +1,244 @@
+#include "tests/asm.h"
+#include <stdio.h>
+
+char in_b, out_b1, out_b2, in_b2;
+
+short in_w, out_w1, out_w2;
+
+int in_l, out_l1, out_l2;
+
+extern void sbb_ib_al ( void );
+asm("\n"
+VG_SYM(sbb_ib_al) ":\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tclc\n"
+"\tsbbb $5, %al\n"
+"\tmovb %al, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tstc\n"
+"\tsbbb $5, %al\n"
+"\tmovb %al, " VG_SYM(out_b2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void sbb_iw_ax ( void );
+asm("\n"
+VG_SYM(sbb_iw_ax) ":\n"
+
+"\tmovw " VG_SYM(in_w) ", %ax\n"
+"\tclc\n"
+"\tsbbw $555, %ax\n"
+"\tmovw %ax, " VG_SYM(out_w1) "\n"
+
+"\tmovw " VG_SYM(in_w) ", %ax\n"
+"\tstc\n"
+"\tsbbw $555, %ax\n"
+"\tmovw %ax, " VG_SYM(out_w2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void sbb_il_eax ( void );
+asm("\n"
+VG_SYM(sbb_il_eax) ":\n"
+
+"\tmovl " VG_SYM(in_l) ", %eax\n"
+"\tclc\n"
+"\tsbbl $555666, %eax\n"
+"\tmovl %eax, " VG_SYM(out_l1) "\n"
+
+"\tmovl " VG_SYM(in_l) ", %eax\n"
+"\tstc\n"
+"\tsbbl $555666, %eax\n"
+"\tmovl %eax, " VG_SYM(out_l2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void sbb_eb_gb ( void );
+asm("\n"
+VG_SYM(sbb_eb_gb) ":\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tclc\n"
+"\tsbbb " VG_SYM(in_b2) ", %al\n"
+"\tmovb %al, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tstc\n"
+"\tsbbb " VG_SYM(in_b2) ", %al\n"
+"\tmovb %al, " VG_SYM(out_b2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void sbb_eb_gb_2 ( void );
+asm("\n"
+VG_SYM(sbb_eb_gb_2) ":\n"
+"\tpushq %rcx\n"
+
+"\tmovb " VG_SYM(in_b) ", %cl\n"
+"\tmovb " VG_SYM(in_b2) ", %dh\n"
+"\tclc\n"
+"\tsbbb %dh,%cl\n"
+"\tmovb %cl, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %cl\n"
+"\tmovb " VG_SYM(in_b2) ", %dh\n"
+"\tstc\n"
+"\tsbbb %dh,%cl\n"
+"\tmovb %cl, " VG_SYM(out_b2) "\n"
+
+"\tpopq %rcx\n"
+"\tretq\n"
+);
+
+
+extern void adc_eb_gb ( void );
+asm("\n"
+VG_SYM(adc_eb_gb) ":\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tclc\n"
+"\tadcb " VG_SYM(in_b2) ", %al\n"
+"\tmovb %al, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tstc\n"
+"\tadcb " VG_SYM(in_b2) ", %al\n"
+"\tmovb %al, " VG_SYM(out_b2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void adc_eb_gb_2 ( void );
+asm("\n"
+VG_SYM(adc_eb_gb_2) ":\n"
+"\tpushq %rcx\n"
+
+"\tmovb " VG_SYM(in_b) ", %cl\n"
+"\tmovb " VG_SYM(in_b2) ", %dh\n"
+"\tclc\n"
+"\tadcb %dh,%cl\n"
+"\tmovb %cl, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %cl\n"
+"\tmovb " VG_SYM(in_b2) ", %dh\n"
+"\tstc\n"
+"\tadcb %dh,%cl\n"
+"\tmovb %cl, " VG_SYM(out_b2) "\n"
+
+"\tpopq %rcx\n"
+"\tretq\n"
+);
+
+extern void adc_ib_al ( void );
+asm("\n"
+VG_SYM(adc_ib_al) ":\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tclc\n"
+"\tadcb $5, %al\n"
+"\tmovb %al, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tstc\n"
+"\tadcb $5, %al\n"
+"\tmovb %al, " VG_SYM(out_b2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void adc_iw_ax ( void );
+asm("\n"
+VG_SYM(adc_iw_ax) ":\n"
+
+"\tmovw " VG_SYM(in_w) ", %ax\n"
+"\tclc\n"
+"\tadcw $555, %ax\n"
+"\tmovw %ax, " VG_SYM(out_w1) "\n"
+
+"\tmovw " VG_SYM(in_w) ", %ax\n"
+"\tstc\n"
+"\tadcw $555, %ax\n"
+"\tmovw %ax, " VG_SYM(out_w2) "\n"
+
+"\tretq\n"
+);
+
+
+extern void adc_il_eax ( void );
+asm("\n"
+VG_SYM(adc_il_eax) ":\n"
+
+"\tmovl " VG_SYM(in_l) ", %eax\n"
+"\tclc\n"
+"\tadcl $555666, %eax\n"
+"\tmovl %eax, " VG_SYM(out_l1) "\n"
+
+"\tmovl " VG_SYM(in_l) ", %eax\n"
+"\tstc\n"
+"\tadcl $555666, %eax\n"
+"\tmovl %eax, " VG_SYM(out_l2) "\n"
+
+"\tretq\n"
+);
+
+
+int main ( void )
+{
+   in_b = 99;
+   sbb_ib_al();
+   printf("r1 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_w = 49999;
+   sbb_iw_ax();
+   printf("r2 = %d %d\n", (int)out_w1, (int)out_w2);
+
+   in_l = 0xF0000000;
+   sbb_il_eax();
+   printf("r3 = %d %d\n", (int)out_l1, (int)out_l2);
+
+   in_b = 99;
+   in_b2 = 88;
+   sbb_eb_gb();
+   printf("r4 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_b = 66;
+   in_b2 = 77;
+   sbb_eb_gb_2();
+   printf("r5 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_b = 99;
+   in_b2 = 88;
+   adc_eb_gb();
+   printf("r6 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_b = 66;
+   in_b2 = 77;
+   adc_eb_gb_2();
+   printf("r7 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_b = 99;
+   adc_ib_al();
+   printf("r8 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_w = 49999;
+   adc_iw_ax();
+   printf("r9 = %d %d\n", (int)out_w1, (int)out_w2);
+
+   in_l = 0xF0000000;
+   adc_il_eax();
+   printf("r10 = %d %d\n", (int)out_l1, (int)out_l2);
+
+   return 0;
+}
diff --git a/none/tests/amd64/sbbmisc.stderr.exp b/none/tests/amd64/sbbmisc.stderr.exp
new file mode 100644 (file)
index 0000000..139597f
--- /dev/null
@@ -0,0 +1,2 @@
+
+
diff --git a/none/tests/amd64/sbbmisc.stdout.exp b/none/tests/amd64/sbbmisc.stdout.exp
new file mode 100644 (file)
index 0000000..2945cc3
--- /dev/null
@@ -0,0 +1,10 @@
+r1 = 94 93
+r2 = -16092 -16093
+r3 = -268991122 -268991123
+r4 = 11 10
+r5 = -11 -12
+r6 = -69 -68
+r7 = -113 -112
+r8 = 104 105
+r9 = -14982 -14981
+r10 = -267879790 -267879789
diff --git a/none/tests/amd64/sbbmisc.vgtest b/none/tests/amd64/sbbmisc.vgtest
new file mode 100644 (file)
index 0000000..b90ba2a
--- /dev/null
@@ -0,0 +1 @@
+prog: sbbmisc
index 20340f9f4bd0caee1cf195b0f9cb073afe531d12..322d6e17d796c2bf641e04b97e721a180d168914 100644 (file)
@@ -140,7 +140,58 @@ VG_SYM(adc_eb_gb_2) ":\n"
 "\tret\n"
 );
 
+extern void adc_ib_al ( void );
+asm("\n"
+VG_SYM(adc_ib_al) ":\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tclc\n"
+"\tadcb $5, %al\n"
+"\tmovb %al, " VG_SYM(out_b1) "\n"
+
+"\tmovb " VG_SYM(in_b) ", %al\n"
+"\tstc\n"
+"\tadcb $5, %al\n"
+"\tmovb %al, " VG_SYM(out_b2) "\n"
 
+"\tret\n"
+);
+
+
+extern void adc_iw_ax ( void );
+asm("\n"
+VG_SYM(adc_iw_ax) ":\n"
+
+"\tmovw " VG_SYM(in_w) ", %ax\n"
+"\tclc\n"
+"\tadcw $555, %ax\n"
+"\tmovw %ax, " VG_SYM(out_w1) "\n"
+
+"\tmovw " VG_SYM(in_w) ", %ax\n"
+"\tstc\n"
+"\tadcw $555, %ax\n"
+"\tmovw %ax, " VG_SYM(out_w2) "\n"
+
+"\tret\n"
+);
+
+
+extern void adc_il_eax ( void );
+asm("\n"
+VG_SYM(adc_il_eax) ":\n"
+
+"\tmovl " VG_SYM(in_l) ", %eax\n"
+"\tclc\n"
+"\tadcl $555666, %eax\n"
+"\tmovl %eax, " VG_SYM(out_l1) "\n"
+
+"\tmovl " VG_SYM(in_l) ", %eax\n"
+"\tstc\n"
+"\tadcl $555666, %eax\n"
+"\tmovl %eax, " VG_SYM(out_l2) "\n"
+
+"\tret\n"
+);
 
 
 int main ( void )
@@ -177,5 +228,17 @@ int main ( void )
    adc_eb_gb_2();
    printf("r7 = %d %d\n", (int)out_b1, (int)out_b2);
 
+   in_b = 99;
+   adc_ib_al();
+   printf("r8 = %d %d\n", (int)out_b1, (int)out_b2);
+
+   in_w = 49999;
+   adc_iw_ax();
+   printf("r9 = %d %d\n", (int)out_w1, (int)out_w2);
+
+   in_l = 0xF0000000;
+   adc_il_eax();
+   printf("r10 = %d %d\n", (int)out_l1, (int)out_l2);
+
    return 0;
 }
index 6c616b05c9d791b129576785ee4f0cea9cd3962a..2945cc32beb7167c093e4cff94b4c6f9d76510f9 100644 (file)
@@ -5,3 +5,6 @@ r4 = 11 10
 r5 = -11 -12
 r6 = -69 -68
 r7 = -113 -112
+r8 = 104 105
+r9 = -14982 -14981
+r10 = -267879790 -267879789