]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
clk: qcom: Constify qcom_cc_driver_data
authorKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tue, 31 Mar 2026 09:17:22 +0000 (11:17 +0200)
committerBjorn Andersson <andersson@kernel.org>
Sun, 5 Apr 2026 19:34:23 +0000 (14:34 -0500)
The static 'struct qcom_cc_driver_data' contains probe match-like data
and is not modified: neither by the driver defining it nor by common.c
code using it.

Make it const for code safety and code readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260331091721.61613-3-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
33 files changed:
drivers/clk/qcom/apss-ipq5424.c
drivers/clk/qcom/cambistmclkcc-kaanapali.c
drivers/clk/qcom/cambistmclkcc-sm8750.c
drivers/clk/qcom/camcc-kaanapali.c
drivers/clk/qcom/camcc-milos.c
drivers/clk/qcom/camcc-qcs615.c
drivers/clk/qcom/camcc-sc8180x.c
drivers/clk/qcom/camcc-sm8450.c
drivers/clk/qcom/camcc-sm8550.c
drivers/clk/qcom/camcc-sm8650.c
drivers/clk/qcom/camcc-sm8750.c
drivers/clk/qcom/camcc-x1e80100.c
drivers/clk/qcom/common.h
drivers/clk/qcom/dispcc-eliza.c
drivers/clk/qcom/dispcc-glymur.c
drivers/clk/qcom/dispcc-kaanapali.c
drivers/clk/qcom/dispcc-milos.c
drivers/clk/qcom/dispcc-qcs615.c
drivers/clk/qcom/gcc-eliza.c
drivers/clk/qcom/gcc-glymur.c
drivers/clk/qcom/gcc-kaanapali.c
drivers/clk/qcom/gcc-milos.c
drivers/clk/qcom/gcc-sc8180x.c
drivers/clk/qcom/gpucc-glymur.c
drivers/clk/qcom/gpucc-kaanapali.c
drivers/clk/qcom/gpucc-milos.c
drivers/clk/qcom/gpucc-qcs615.c
drivers/clk/qcom/videocc-glymur.c
drivers/clk/qcom/videocc-kaanapali.c
drivers/clk/qcom/videocc-milos.c
drivers/clk/qcom/videocc-qcs615.c
drivers/clk/qcom/videocc-sm8450.c
drivers/clk/qcom/videocc-sm8750.c

index 2d622c1fe5d0522f00d7acb4614ebe4381e066c0..1662c83058bcb12a3e02df61abe3d6e3a48b95b8 100644 (file)
@@ -211,7 +211,7 @@ static struct clk_alpha_pll *ipa5424_apss_plls[] = {
        &ipq5424_apss_pll,
 };
 
-static struct qcom_cc_driver_data ipa5424_apss_driver_data = {
+static const struct qcom_cc_driver_data ipa5424_apss_driver_data = {
        .alpha_plls = ipa5424_apss_plls,
        .num_alpha_plls = ARRAY_SIZE(ipa5424_apss_plls),
 };
index 6ad912403b8bc5aa10b480a0efdc56aab295d2e9..77adb453ab2192151552241ee270893c385fa46e 100644 (file)
@@ -395,7 +395,7 @@ static const struct regmap_config cam_bist_mclk_cc_kaanapali_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_bist_mclk_cc_kaanapali_driver_data = {
+static const struct qcom_cc_driver_data cam_bist_mclk_cc_kaanapali_driver_data = {
        .alpha_plls = cam_bist_mclk_cc_kaanapali_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_bist_mclk_cc_kaanapali_plls),
        .clk_cbcrs = cam_bist_mclk_cc_kaanapali_critical_cbcrs,
index d889a8f6561d8409b24b89e2ba414f8f7bd79515..f0d7e3b7c5320a5b975262f1518a1d8fdb9d9a37 100644 (file)
@@ -414,7 +414,7 @@ static const struct regmap_config cam_bist_mclk_cc_sm8750_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_bist_mclk_cc_sm8750_driver_data = {
+static const struct qcom_cc_driver_data cam_bist_mclk_cc_sm8750_driver_data = {
        .alpha_plls = cam_bist_mclk_cc_sm8750_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_bist_mclk_cc_sm8750_plls),
        .clk_cbcrs = cam_bist_mclk_cc_sm8750_critical_cbcrs,
index c848ca99e9dff4057d56cadfa6a4d09bd27cda0f..acf5f476955b1805b62c334074b3cfffab1bd209 100644 (file)
@@ -2615,7 +2615,7 @@ static const struct regmap_config cam_cc_kaanapali_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_kaanapali_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_kaanapali_driver_data = {
        .alpha_plls = cam_cc_kaanapali_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_kaanapali_plls),
        .clk_cbcrs = cam_cc_kaanapali_critical_cbcrs,
index 0077c9c9249f35e0b14c74c8db45b1debd3b3526..556c3c33c10620f8c776f19d42dddc429dba8c2c 100644 (file)
@@ -2117,7 +2117,7 @@ static const struct regmap_config cam_cc_milos_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_milos_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_milos_driver_data = {
        .alpha_plls = cam_cc_milos_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_milos_plls),
        .clk_cbcrs = cam_cc_milos_critical_cbcrs,
index c063a3bfacd006af0fcbdbd9afbaa22ab83bcf8e..8377126c2cfe0af5982bde86ac782aed5601587d 100644 (file)
@@ -1556,7 +1556,7 @@ static const struct regmap_config cam_cc_qcs615_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_qcs615_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_qcs615_driver_data = {
        .alpha_plls = cam_cc_qcs615_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_qcs615_plls),
 };
index 0291e2f3ea80274a0ab165c684f8008e61708fc9..bd06d271928e47f4108b903b4a0c10dcf583ae6a 100644 (file)
@@ -2842,7 +2842,7 @@ static const struct regmap_config cam_cc_sc8180x_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_sc8180x_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_sc8180x_driver_data = {
        .alpha_plls = cam_cc_sc8180x_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_sc8180x_plls),
        .clk_cbcrs = cam_cc_sc8180x_critical_cbcrs,
index ef8cf54d0eed6da42fa5d7e961c88f276d8bb3c9..430b436a673eedc628ba0f9fd702f5b990f476c0 100644 (file)
@@ -3030,7 +3030,7 @@ static struct gdsc *cam_cc_sm8450_gdscs[] = {
        [TITAN_TOP_GDSC] = &titan_top_gdsc,
 };
 
-static struct qcom_cc_driver_data cam_cc_sm8450_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_sm8450_driver_data = {
        .alpha_plls = cam_cc_sm8450_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_sm8450_plls),
        .clk_cbcrs = cam_cc_sm8450_critical_cbcrs,
index b8ece8a57a8a9d86a2dd934be2ebadac28bfbf7e..8c42ae7544aa2b0d662945619f56ab7a975b4622 100644 (file)
@@ -3530,7 +3530,7 @@ static const struct regmap_config cam_cc_sm8550_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_sm8550_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_sm8550_driver_data = {
        .alpha_plls = cam_cc_sm8550_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_sm8550_plls),
        .clk_cbcrs = cam_cc_sm8550_critical_cbcrs,
index 8b388904f56fc3b3f77a43a09f735ace24b9fcf7..c0055fb08f62cc8e93e8715be2dde6c1b783ec67 100644 (file)
@@ -3548,7 +3548,7 @@ static const struct regmap_config cam_cc_sm8650_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_sm8650_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_sm8650_driver_data = {
        .alpha_plls = cam_cc_sm8650_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_sm8650_plls),
        .clk_cbcrs = cam_cc_sm8650_critical_cbcrs,
index a797b783d4a9445ddcac40506f218d184635684a..9b6d499812678468ae072636ffe0356f23618f6e 100644 (file)
@@ -2666,7 +2666,7 @@ static const struct regmap_config cam_cc_sm8750_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_sm8750_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_sm8750_driver_data = {
        .alpha_plls = cam_cc_sm8750_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_sm8750_plls),
        .clk_cbcrs = cam_cc_sm8750_critical_cbcrs,
index cbcc1c9fcb341e51272f5595f574f9cb7ef2b52e..38742053312589db96a8bd1618065df656b41d77 100644 (file)
@@ -2447,7 +2447,7 @@ static const struct regmap_config cam_cc_x1e80100_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data cam_cc_x1e80100_driver_data = {
+static const struct qcom_cc_driver_data cam_cc_x1e80100_driver_data = {
        .alpha_plls = cam_cc_x1e80100_plls,
        .num_alpha_plls = ARRAY_SIZE(cam_cc_x1e80100_plls),
        .clk_cbcrs = cam_cc_x1e80100_critical_cbcrs,
index 953c91f7b14502546d8ade0dccc4790fcbb53ddb..69c4b21333e5967a16c0a1cc47a2b45b81a6fc06 100644 (file)
@@ -49,7 +49,7 @@ struct qcom_cc_desc {
        size_t num_icc_hws;
        unsigned int icc_first_node_id;
        bool use_rpm;
-       struct qcom_cc_driver_data *driver_data;
+       const struct qcom_cc_driver_data *driver_data;
 };
 
 /**
index 062be01c1b0167f074bfd1bbde4f65d7cd9853ae..60de3c743621efb62e17faa96c6a1625fa4ab281 100644 (file)
@@ -2076,7 +2076,7 @@ static void clk_eliza_regs_configure(struct device *dev, struct regmap *regmap)
        regmap_set_bits(regmap, DISP_CC_MISC_CMD, BIT(4));
 }
 
-static struct qcom_cc_driver_data disp_cc_eliza_driver_data = {
+static const struct qcom_cc_driver_data disp_cc_eliza_driver_data = {
        .alpha_plls = disp_cc_eliza_plls,
        .num_alpha_plls = ARRAY_SIZE(disp_cc_eliza_plls),
        .clk_cbcrs = disp_cc_eliza_critical_cbcrs,
index fd085cb906672821f667ff285c2612e036230256..aae60291b55e678e992f05a0f96cf392bce74494 100644 (file)
@@ -1934,7 +1934,7 @@ static const struct regmap_config disp_cc_glymur_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data disp_cc_glymur_driver_data = {
+static const struct qcom_cc_driver_data disp_cc_glymur_driver_data = {
        .alpha_plls = disp_cc_glymur_plls,
        .num_alpha_plls = ARRAY_SIZE(disp_cc_glymur_plls),
        .clk_cbcrs = disp_cc_glymur_critical_cbcrs,
index 5ec4d2ab6b674dd532cb39b1263672496237dbbe..ffdb4de3a33e776da3f7024692a26623bfce1bc8 100644 (file)
@@ -1907,7 +1907,7 @@ static void clk_kaanapali_regs_configure(struct device *dev, struct regmap *regm
        regmap_update_bits(regmap, DISP_CC_MISC_CMD, BIT(4), BIT(4));
 }
 
-static struct qcom_cc_driver_data disp_cc_kaanapali_driver_data = {
+static const struct qcom_cc_driver_data disp_cc_kaanapali_driver_data = {
        .alpha_plls = disp_cc_kaanapali_plls,
        .num_alpha_plls = ARRAY_SIZE(disp_cc_kaanapali_plls),
        .clk_cbcrs = disp_cc_kaanapali_critical_cbcrs,
index 0a483fb6683afc4d934d081a3cb31b8a7523f4dd..17ff10cb2f6b91ce0d518b4a132e406afec8b89f 100644 (file)
@@ -926,7 +926,7 @@ static void disp_cc_milos_clk_regs_configure(struct device *dev, struct regmap *
 }
 
 
-static struct qcom_cc_driver_data disp_cc_milos_driver_data = {
+static const struct qcom_cc_driver_data disp_cc_milos_driver_data = {
        .alpha_plls = disp_cc_milos_plls,
        .num_alpha_plls = ARRAY_SIZE(disp_cc_milos_plls),
        .clk_cbcrs = disp_cc_milos_critical_cbcrs,
index 4a6d7846609882d8d788fe1c1cd8386cdfe37136..21974e2574f58a12b266b7bf2bb39c331cc5c871 100644 (file)
@@ -751,7 +751,7 @@ static const struct regmap_config disp_cc_qcs615_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data disp_cc_qcs615_driver_data = {
+static const struct qcom_cc_driver_data disp_cc_qcs615_driver_data = {
        .alpha_plls = disp_cc_qcs615_plls,
        .num_alpha_plls = ARRAY_SIZE(disp_cc_qcs615_plls),
        .clk_cbcrs = disp_cc_qcs615_critical_cbcrs,
index 338494385752b8868e511f1a301273c893838817..dc8ccd2d27d0a035a84ab93b94e717ff6edae556 100644 (file)
@@ -3051,7 +3051,7 @@ static void clk_eliza_regs_configure(struct device *dev, struct regmap *regmap)
        qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_axi_clk, true);
 }
 
-static struct qcom_cc_driver_data gcc_eliza_driver_data = {
+static const struct qcom_cc_driver_data gcc_eliza_driver_data = {
        .clk_cbcrs = gcc_eliza_critical_cbcrs,
        .num_clk_cbcrs = ARRAY_SIZE(gcc_eliza_critical_cbcrs),
        .dfs_rcgs = gcc_eliza_dfs_clocks,
index 1a5d3d1827054a480579709b368f1db43926a01d..7a199e1bd49312e3655f1a672c232b9ef6ab59cb 100644 (file)
@@ -8561,7 +8561,7 @@ static void clk_glymur_regs_configure(struct device *dev, struct regmap *regmap)
        qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
 }
 
-static struct qcom_cc_driver_data gcc_glymur_driver_data = {
+static const struct qcom_cc_driver_data gcc_glymur_driver_data = {
        .clk_cbcrs = gcc_glymur_critical_cbcrs,
        .num_clk_cbcrs = ARRAY_SIZE(gcc_glymur_critical_cbcrs),
        .dfs_rcgs = gcc_dfs_clocks,
index 210ec7afbb67ddc03c6486aa373d1280440fe338..44275bac095ecb4a50db2d07189ffbb8aae12184 100644 (file)
@@ -3485,7 +3485,7 @@ static void clk_kaanapali_regs_configure(struct device *dev, struct regmap *regm
        qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
 }
 
-static struct qcom_cc_driver_data gcc_kaanapali_driver_data = {
+static const struct qcom_cc_driver_data gcc_kaanapali_driver_data = {
        .clk_cbcrs = gcc_kaanapali_critical_cbcrs,
        .num_clk_cbcrs = ARRAY_SIZE(gcc_kaanapali_critical_cbcrs),
        .dfs_rcgs = gcc_dfs_clocks,
index 81fa09ec55d7f6d6cb761affd3b93301a102f61f..3438fb9039ee6ab714edf6c1680f464503bac758 100644 (file)
@@ -3171,7 +3171,7 @@ static const struct regmap_config gcc_milos_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data gcc_milos_driver_data = {
+static const struct qcom_cc_driver_data gcc_milos_driver_data = {
        .clk_cbcrs = gcc_milos_critical_cbcrs,
        .num_clk_cbcrs = ARRAY_SIZE(gcc_milos_critical_cbcrs),
        .dfs_rcgs = gcc_milos_dfs_clocks,
index 88b95d5326d909631aba681fc2c086911368b8e8..35c2e9d555b865ccfcdf0e373741a59ddea7bdaa 100644 (file)
@@ -4675,7 +4675,7 @@ static void clk_sc8180x_regs_configure(struct device *dev, struct regmap *regmap
        regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
 }
 
-static struct qcom_cc_driver_data gcc_sc8180x_driver_data = {
+static const struct qcom_cc_driver_data gcc_sc8180x_driver_data = {
        .clk_cbcrs = gcc_sc8180x_critical_cbcrs,
        .num_clk_cbcrs = ARRAY_SIZE(gcc_sc8180x_critical_cbcrs),
        .dfs_rcgs = gcc_sc8180x_dfs_clocks,
index 1a1d946347d0080b3e71df8c1afe5964a82eee6e..824b4e09c3f93dd87ba13f47933fbb92a46b4a95 100644 (file)
@@ -574,7 +574,7 @@ static const struct regmap_config gpu_cc_glymur_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data gpu_cc_glymur_driver_data = {
+static const struct qcom_cc_driver_data gpu_cc_glymur_driver_data = {
        .alpha_plls = gpu_cc_glymur_plls,
        .num_alpha_plls = ARRAY_SIZE(gpu_cc_glymur_plls),
        .clk_cbcrs = gpu_cc_glymur_critical_cbcrs,
index d93d06067fbfefb2762349df9d08f48ff22654b9..94f0feb254b39d83cbd38280ece1f5df25119fc0 100644 (file)
@@ -437,7 +437,7 @@ static const struct regmap_config gpu_cc_kaanapali_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data gpu_cc_kaanapali_driver_data = {
+static const struct qcom_cc_driver_data gpu_cc_kaanapali_driver_data = {
        .alpha_plls = gpu_cc_kaanapali_plls,
        .num_alpha_plls = ARRAY_SIZE(gpu_cc_kaanapali_plls),
        .clk_cbcrs = gpu_cc_kaanapali_critical_cbcrs,
index 4ee09879156ecde61fcbc8473d3d33514e6c3e41..7a8a3917db9b6b3f6a8ba66b0a1ae7f2905aad92 100644 (file)
@@ -518,7 +518,7 @@ static const struct regmap_config gpu_cc_milos_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data gpu_cc_milos_driver_data = {
+static const struct qcom_cc_driver_data gpu_cc_milos_driver_data = {
        .alpha_plls = gpu_cc_milos_plls,
        .num_alpha_plls = ARRAY_SIZE(gpu_cc_milos_plls),
        .clk_cbcrs = gpu_cc_milos_critical_cbcrs,
index ec6739c08425a96cb8f81e3dc0cb306937032632..8233136db4d8d148db22a9a129a0feec3e9c3477 100644 (file)
@@ -485,7 +485,7 @@ static void clk_qcs615_regs_crc_configure(struct device *dev, struct regmap *reg
        regmap_update_bits(regmap, 0x1024, 0x00800000, 0x00800000);
 }
 
-static struct qcom_cc_driver_data gpu_cc_qcs615_driver_data = {
+static const struct qcom_cc_driver_data gpu_cc_qcs615_driver_data = {
        .alpha_plls = gpu_cc_qcs615_plls,
        .num_alpha_plls = ARRAY_SIZE(gpu_cc_qcs615_plls),
        .clk_cbcrs = gpu_cc_qcs615_critical_cbcrs,
index ea20605dd1e5bb9c65a05be17aaad146e956bbd3..4f1ad0db30e56a515575e35d26bfedf504d9fbf1 100644 (file)
@@ -487,7 +487,7 @@ static void clk_glymur_regs_configure(struct device *dev, struct regmap *regmap)
        regmap_update_bits(regmap, 0x9f24, BIT(0), BIT(0));
 }
 
-static struct qcom_cc_driver_data video_cc_glymur_driver_data = {
+static const struct qcom_cc_driver_data video_cc_glymur_driver_data = {
        .alpha_plls = video_cc_glymur_plls,
        .num_alpha_plls = ARRAY_SIZE(video_cc_glymur_plls),
        .clk_cbcrs = video_cc_glymur_critical_cbcrs,
index 835a59536ba79c391d4a0a1e4bab0a66f253bef0..b060ee34e8a43cbe20791b37cf5e79742857f273 100644 (file)
@@ -776,7 +776,7 @@ static void clk_kaanapali_regs_configure(struct device *dev, struct regmap *regm
        regmap_set_bits(regmap, 0x8158, ACCU_CFG_MASK);
 }
 
-static struct qcom_cc_driver_data video_cc_kaanapali_driver_data = {
+static const struct qcom_cc_driver_data video_cc_kaanapali_driver_data = {
        .alpha_plls = video_cc_kaanapali_plls,
        .num_alpha_plls = ARRAY_SIZE(video_cc_kaanapali_plls),
        .clk_cbcrs = video_cc_kaanapali_critical_cbcrs,
index acc9df295d4fb43eaa125205c202f26f2a1fa9bc..012a13f8fb0b571ad673471e1d6f9d7fe857093b 100644 (file)
@@ -359,7 +359,7 @@ static const struct regmap_config video_cc_milos_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data video_cc_milos_driver_data = {
+static const struct qcom_cc_driver_data video_cc_milos_driver_data = {
        .alpha_plls = video_cc_milos_plls,
        .num_alpha_plls = ARRAY_SIZE(video_cc_milos_plls),
        .clk_cbcrs = video_cc_milos_critical_cbcrs,
index 1b41fa44c17ea05d637f2cd8dd8c5b9b94faeeb1..338ab803d56a439dc6fe279a60c22c3bacefa12e 100644 (file)
@@ -295,7 +295,7 @@ static const struct regmap_config video_cc_qcs615_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data video_cc_qcs615_driver_data = {
+static const struct qcom_cc_driver_data video_cc_qcs615_driver_data = {
        .alpha_plls = video_cc_qcs615_plls,
        .num_alpha_plls = ARRAY_SIZE(video_cc_qcs615_plls),
        .clk_cbcrs = video_cc_qcs615_critical_cbcrs,
index dc168ce199cccb8c33d265a0ae4aab0de6f745b2..acd0928be1f6922bf64c212db12c1a373f7365db 100644 (file)
@@ -427,7 +427,7 @@ static const struct regmap_config video_cc_sm8450_regmap_config = {
        .fast_io = true,
 };
 
-static struct qcom_cc_driver_data video_cc_sm8450_driver_data = {
+static const struct qcom_cc_driver_data video_cc_sm8450_driver_data = {
        .alpha_plls = video_cc_sm8450_plls,
        .num_alpha_plls = ARRAY_SIZE(video_cc_sm8450_plls),
        .clk_cbcrs = video_cc_sm8450_critical_cbcrs,
index 5c1034dd5f5759e89aca53f2fe971ef134ca5bb1..7e77822c132c1b9cd80d246bc239f7236e698660 100644 (file)
@@ -407,7 +407,7 @@ static void clk_sm8750_regs_configure(struct device *dev, struct regmap *regmap)
        regmap_update_bits(regmap, 0x9f24, BIT(0), BIT(0));
 }
 
-static struct qcom_cc_driver_data video_cc_sm8750_driver_data = {
+static const struct qcom_cc_driver_data video_cc_sm8750_driver_data = {
        .alpha_plls = video_cc_sm8750_plls,
        .num_alpha_plls = ARRAY_SIZE(video_cc_sm8750_plls),
        .clk_cbcrs = video_cc_sm8750_critical_cbcrs,