AVX512FP16: Fix ICE for 2 v4hf vector concat

For V4HFmode, doing vector concat like

__builtin_shufflevector (a, b, {0, 1, 2, 3, 4, 5, 6, 7})

could trigger ICE since it is not handled in ix86_vector_init ().

Handle HFmode like HImode to avoid such ICE.

gcc/ChangeLog:

	* config/i386/i386-expand.c (ix86_expand_vector_init):
	For half_vector concat for HFmode, handle them like HImode.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512fp16-v4hf-concat.c: New test.

diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 95274201f4f31e616e8f26ac5227b2055a2775ef..1b011047251b89bc16339ddf4d1e91c25dab48ac 100644 (file)
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -15122,7 +15122,8 @@ ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals)
          rtx ops[2] = { XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1) };
          if (inner_mode == QImode
              || inner_mode == HImode
-             || inner_mode == TImode)
+             || inner_mode == TImode
+             || inner_mode == HFmode)
            {
              unsigned int n_bits = n_elts * GET_MODE_SIZE (inner_mode);
              scalar_mode elt_mode = inner_mode == TImode ? DImode : SImode;

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c b/gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c
new file mode 100644 (file)
index 0000000..3b8a7f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vpunpcklqdq" 1 } } */
+
+typedef _Float16 v8hf __attribute__((vector_size (16)));
+typedef _Float16 v4hf __attribute__((vector_size (8)));
+
+v8hf foov (v4hf a, v4hf b)
+{
+    return __builtin_shufflevector (a, b, 0, 1, 2, 3, 4, 5, 6, 7);
+}
+
+v8hf foov2 (v4hf a)
+{
+    return __builtin_shufflevector (a, (v4hf){0}, 0, 1, 2, 3, 4, 5, 6, 7);
+}