RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

Base on the discussion here:
https://github.com/riscv/riscv-v-spec/issues/884

vfwcvt doesn't depend on FRM. So remove FRM preparing for mode switching support.

gcc/ChangeLog:

	* config/riscv/vector.md: Remove FRM.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index cb4e77e7854b23b8fb684b0c58c3a6ac8c800ca1..cd41ebbb24f56a6ab8340e78852158a4c0bb3fdb 100644 (file)
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -7178,10 +7178,8 @@
             (match_operand 5 "const_int_operand"                 "    i,    i")
             (match_operand 6 "const_int_operand"                 "    i,    i")
             (match_operand 7 "const_int_operand"                 "    i,    i")
-            (match_operand 8 "const_int_operand"                 "    i,    i")
             (reg:SI VL_REGNUM)
-            (reg:SI VTYPE_REGNUM)
-            (reg:SI FRM_REGNUM)] UNSPEC_VPREDICATE)
+            (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
          (float_extend:VWEXTF
             (match_operand:<V_DOUBLE_TRUNC> 3 "register_operand" "   vr,   vr"))
          (match_operand:VWEXTF 2 "vector_merge_operand"          "   vu,    0")))]