struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_crtc *pipe_crtc;
bool is_hdmi = intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI);
- int i;
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
intel_ddi_disable_transcoder_func(old_crtc_state);
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
struct intel_crtc *pipe_crtc;
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
bool is_hdmi = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI);
- int i;
/* 128b/132b SST */
if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) {
intel_ddi_wait_for_fec_status(encoder, crtc_state, true);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
intel_atomic_get_new_crtc_state(state, crtc);
enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
struct intel_crtc *pipe_crtc;
- int i;
if (drm_WARN_ON(display->drm, crtc->active))
return;
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *new_pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
intel_encoders_pre_enable(state, crtc);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
if (!transcoder_is_dsi(cpu_transcoder))
hsw_configure_cpu_transcoder(new_crtc_state);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
intel_encoders_enable(state, crtc);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);
enum pipe hsw_workaround_pipe;
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc *pipe_crtc;
- int i;
/*
* FIXME collapse everything to one hook.
intel_encoders_post_pll_disable(state, crtc);
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
(new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))
-#define for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
- for ((i) = 0; \
+#define __for_each_crtc_in_masks(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = 0; \
(i) < (I915_MAX_PIPES * 2) && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)++) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-#define for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
- for ((i) = (I915_MAX_PIPES * 2 - 1); \
+#define __for_each_crtc_in_masks_reverse(display, crtc, first_pipes, second_pipes, i) \
+ for (int (i) = (I915_MAX_PIPES * 2 - 1); \
(i) >= 0 && ((crtc) = intel_crtc_for_pipe(display, (i) % I915_MAX_PIPES), 1); \
(i)--) \
for_each_if((crtc) && ((first_pipes) | ((second_pipes) << I915_MAX_PIPES)) & BIT(i))
-#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state, i) \
- for_each_crtc_in_masks(display, crtc, \
- _intel_modeset_primary_pipes(crtc_state), \
- _intel_modeset_secondary_pipes(crtc_state), \
- i)
-
-#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state, i) \
- for_each_crtc_in_masks_reverse(display, crtc, \
- _intel_modeset_primary_pipes(crtc_state), \
- _intel_modeset_secondary_pipes(crtc_state), \
- i)
+#define for_each_pipe_crtc_modeset_disable(display, crtc, crtc_state) \
+ __for_each_crtc_in_masks(display, crtc, \
+ _intel_modeset_primary_pipes(crtc_state), \
+ _intel_modeset_secondary_pipes(crtc_state), \
+ __UNIQUE_ID(i))
+
+#define for_each_pipe_crtc_modeset_enable(display, crtc, crtc_state) \
+ __for_each_crtc_in_masks_reverse(display, crtc, \
+ _intel_modeset_primary_pipes(crtc_state), \
+ _intel_modeset_secondary_pipes(crtc_state), \
+ __UNIQUE_ID(i))
int intel_atomic_check(struct drm_device *dev, struct drm_atomic_commit *state);
u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
drm_atomic_get_mst_payload_state(new_mst_state, connector->mst.port);
struct intel_crtc *pipe_crtc;
bool last_mst_stream;
- int i;
last_mst_stream = intel_dp_mst_dec_active_streams(intel_dp);
drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && last_mst_stream &&
!intel_dp_mst_is_master_trans(old_crtc_state));
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
intel_ddi_disable_transcoder_func(old_crtc_state);
- for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state, i) {
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, old_crtc_state) {
const struct intel_crtc_state *old_pipe_crtc_state =
intel_atomic_get_old_crtc_state(state, pipe_crtc);
enum transcoder trans = pipe_config->cpu_transcoder;
bool first_mst_stream = intel_dp_mst_active_streams(intel_dp) == 1;
struct intel_crtc *pipe_crtc;
- int ret, i;
+ int ret;
drm_WARN_ON(display->drm, pipe_config->has_pch_encoder);
intel_enable_transcoder(pipe_config);
- for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config, i) {
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, pipe_config) {
const struct intel_crtc_state *pipe_crtc_state =
intel_atomic_get_new_crtc_state(state, pipe_crtc);