usb: dwc3: Correct some typos in comments

Fixed some confusing typos that were currently identified with codespell,
the details are as follows:

-in the code comments:
drivers/usb/dwc3/core.c:1406: feild ==> field
drivers/usb/dwc3/core.h:84: boundries ==> boundaries
drivers/usb/dwc3/ep0.c:148: issueing ==> issuing
drivers/usb/dwc3/host.c:38: temperary ==> temporarily

Also fixed a syntax problem in the comments.

Signed-off-by: Shen Lichuan <shenlichuan@vivo.com>
Link: https://lore.kernel.org/r/20240930022526.7255-1-shenlichuan@vivo.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 9eb085f359ce3fe7ee9667ccfbe29bc591de0d54..3612a57f7877a6b7ba52d0761ed5674354f18588 100644 (file)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1403,7 +1403,7 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
        /*
         * When configured in HOST mode, after issuing U3/L2 exit controller
-        * fails to send proper CRC checksum in CRC5 feild. Because of this
+        * fails to send proper CRC checksum in CRC5 field. Because of this
         * behaviour Transaction Error is generated, resulting in reset and
         * re-enumeration of usb device attached. All the termsel, xcvrsel,
         * opmode becomes 0 during end of resume. Enabling bit 10 of GUCTL1

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index c71240e8f7c7dadca3d952163270815f3953a1a6..2cb88e08e74633dd921c611728ad57d8f3fdfdcd 100644 (file)
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -81,7 +81,7 @@
 #define DWC3_GSNPSREV_MASK     0xffff
 #define DWC3_GSNPS_ID(p)       (((p) & DWC3_GSNPSID_MASK) >> 16)
 
-/* DWC3 registers memory space boundries */
+/* DWC3 registers memory space boundaries */
 #define DWC3_XHCI_REGS_START           0x0
 #define DWC3_XHCI_REGS_END             0x7fff
 #define DWC3_GLOBALS_REGS_START                0xc100

diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index c9533a99e47c89d61f4c06609680e91a5320600f..f3d97ad5156ee9278a61d0c8eeb292b13fc395a8 100644 (file)
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -145,7 +145,7 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
         * Unfortunately we have uncovered a limitation wrt the Data Phase.
         *
         * Section 9.4 says we can wait for the XferNotReady(DATA) event to
-        * come before issueing Start Transfer command, but if we do, we will
+        * come before issuing Start Transfer command, but if we do, we will
         * miss situations where the host starts another SETUP phase instead of
         * the DATA phase.  Such cases happen at least on TD.7.6 of the Link
         * Layer Compliance Suite.

diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
index e0533cee6870badb266560d41b3b62ae02a1f608..b48e108fc8fe7343446946e7babf9ba3bc0d2dc3 100644 (file)
--- a/drivers/usb/dwc3/host.c
+++ b/drivers/usb/dwc3/host.c
@@ -35,7 +35,7 @@ static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
        u32 reg;
        int i;
 
-       /* xhci regs is not mapped yet, do it temperary here */
+       /* xhci regs are not mapped yet, do it temporarily here */
        if (dwc->xhci_resources[0].start) {
                xhci_regs = ioremap(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END);
                if (!xhci_regs) {