dmaengine: dw-edma: Remove dw_edma_add_irq_mask()

Function dw_edma_add_irq_mask() sets the mask of the
interrupts alloted to read / write channels in a variable.
The mask set for read / write channels is niether used nor
this function is called else where, making it redundant.
The redundant function can be removed safely as it is
not affecting anything.

Signed-off-by: Devendra K Verma <devendra.verma@amd.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260526053111.3244488-1-devverma@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
index c2feb3adc79fa94b016913443305b9fae9deef12..89a4c498a17b8ef8fec24e6bbb0b41e1ed57e53a 100644 (file)
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -988,20 +988,12 @@ static inline void dw_edma_dec_irq_alloc(int *nr_irqs, u32 *alloc, u16 cnt)
        }
 }
 
-static inline void dw_edma_add_irq_mask(u32 *mask, u32 alloc, u16 cnt)
-{
-       while (*mask * alloc < cnt)
-               (*mask)++;
-}
-
 static int dw_edma_irq_request(struct dw_edma *dw,
                               u32 *wr_alloc, u32 *rd_alloc)
 {
        struct dw_edma_chip *chip = dw->chip;
        struct device *dev = dw->chip->dev;
        struct msi_desc *msi_desc;
-       u32 wr_mask = 1;
-       u32 rd_mask = 1;
        int i, err = 0;
        u32 ch_cnt;
        int irq;
@@ -1038,9 +1030,6 @@ static int dw_edma_irq_request(struct dw_edma *dw,
                        dw_edma_dec_irq_alloc(&tmp, rd_alloc, dw->rd_ch_cnt);
                }
 
-               dw_edma_add_irq_mask(&wr_mask, *wr_alloc, dw->wr_ch_cnt);
-               dw_edma_add_irq_mask(&rd_mask, *rd_alloc, dw->rd_ch_cnt);
-
                for (i = 0; i < (*wr_alloc + *rd_alloc); i++) {
                        irq = chip->ops->irq_vector(dev, i);
                        err = request_irq(irq,