rs6000 has instructions that can do almost everything 32 bit
at least as efficiently as corresponding 64 bit things. The
mode promotion can be defered to when a wide mode is necessary.
So it helps a lot not promote mode for pseudos. SPECint test
shows that the overall performance improvement (by geomean) is
more than 2% with this patch.
testsuite/gcc.target/powerpc/not-promote-mode.c illustrates how
the patch eliminates the redundant extensions and do further
optimization by disabling mode promotion for pseduos.
gcc/ChangeLog
* config/rs6000/rs6000.h (PROMOTE_MODE): Remove.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/not-promote-mode.c: New.
(cherry picked from commit
9080a3bf23297885fdc47221da37a71d6dec93c5)
\f
/* Target machine storage layout. */
-/* Define this macro if it is advisable to hold scalars in registers
- in a wider mode than that declared by the program. In such cases,
- the value is constrained to be within the bounds of the declared
- type, but kept valid in the wider mode. The signedness of the
- extension may differ from that of the type. */
-
-#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
- if (GET_MODE_CLASS (MODE) == MODE_INT \
- && GET_MODE_SIZE (MODE) < (TARGET_32BIT ? 4 : 8)) \
- (MODE) = TARGET_32BIT ? SImode : DImode;
-
/* Define this if most significant bit is lowest numbered
in instructions that operate on numbered bit-fields. */
/* That is true on RS/6000. */
--- /dev/null
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-O2" } */
+
+extern void bar ();
+
+void foo ()
+{
+ int i;
+ for (i = 0; i < 10000; i++)
+ bar ();
+}
+
+/* { dg-final { scan-assembler-not {\mrldicl\M} } } */