arm64: dts: qcom: sm8750: Add CDSP

Add nodes for the CDSP and its SMP2P.  These are compatible with earlier
SM8650 with difference in one more interrupt.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250312-b4-sm8750-cdsp-v4-1-4925d607cea6@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index e4670fefff7c4cc6fbdd42285276d6a870c2121d..798e1cf0bc96687f4cd9e9dd50627b5887994cee 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -545,6 +545,32 @@
                };
        };
 
+       smp2p-cdsp {
+               compatible = "qcom,smp2p";
+
+               interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+                                            IPCC_MPROC_SIGNAL_SMP2P
+                                            IRQ_TYPE_EDGE_RISING>;
+
+               mboxes = <&ipcc IPCC_CLIENT_CDSP
+                               IPCC_MPROC_SIGNAL_SMP2P>;
+
+               qcom,smem = <94>, <432>;
+               qcom,local-pid = <0>;
+               qcom,remote-pid = <5>;
+
+               smp2p_cdsp_out: master-kernel {
+                       qcom,entry-name = "master-kernel";
+                       #qcom,smem-state-cells = <1>;
+               };
+
+               smp2p_cdsp_in: slave-kernel {
+                       qcom,entry-name = "slave-kernel";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+       };
+
        soc: soc@0 {
                compatible = "simple-bus";
 
@@ -3284,6 +3310,174 @@
                        qcom,bcm-voters = <&apps_bcm_voter>;
                        #interconnect-cells = <2>;
                };
+
+               remoteproc_cdsp: remoteproc@32300000 {
+                       compatible = "qcom,sm8750-cdsp-pas", "qcom,sm8650-cdsp-pas";
+                       reg = <0x0 0x32300000 0x0 0x10000>;
+
+                       interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 7 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog",
+                                         "fatal",
+                                         "ready",
+                                         "handover",
+                                         "stop-ack",
+                                         "shutdown-ack";
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
+
+                       interconnects = <&nsp_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+
+                       power-domains = <&rpmhpd RPMHPD_CX>,
+                                       <&rpmhpd RPMHPD_MXC>,
+                                       <&rpmhpd RPMHPD_NSP>;
+                       power-domain-names = "cx",
+                                            "mxc",
+                                            "nsp";
+
+                       memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>, <&global_sync_mem>;
+                       qcom,qmp = <&aoss_qmp>;
+                       qcom,smem-states = <&smp2p_cdsp_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+                                                            IPCC_MPROC_SIGNAL_GLINK_QMP
+                                                            IRQ_TYPE_EDGE_RISING>;
+                               mboxes = <&ipcc IPCC_CLIENT_CDSP
+                                               IPCC_MPROC_SIGNAL_GLINK_QMP>;
+                               qcom,remote-pid = <5>;
+                               label = "cdsp";
+
+                               fastrpc {
+                                       compatible = "qcom,fastrpc";
+                                       qcom,glink-channels = "fastrpcglink-apps-dsp";
+                                       label = "cdsp";
+                                       qcom,non-secure-domain;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       compute-cb@1 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <1>;
+                                               iommus = <&apps_smmu 0x19c1 0x0>,
+                                                        <&apps_smmu 0x0c21 0x0>,
+                                                        <&apps_smmu 0x0c01 0x40>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@2 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <2>;
+                                               iommus = <&apps_smmu 0x1962 0x0>,
+                                                        <&apps_smmu 0x0c02 0x20>,
+                                                        <&apps_smmu 0x0c42 0x0>,
+                                                        <&apps_smmu 0x19c2 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@3 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <3>;
+                                               iommus = <&apps_smmu 0x1963 0x0>,
+                                                        <&apps_smmu 0x0c23 0x0>,
+                                                        <&apps_smmu 0x0c03 0x40>,
+                                                        <&apps_smmu 0x19c3 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@4 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <4>;
+                                               iommus = <&apps_smmu 0x1964 0x0>,
+                                                        <&apps_smmu 0x0c24 0x0>,
+                                                        <&apps_smmu 0x0c04 0x40>,
+                                                        <&apps_smmu 0x19c4 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@5 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <5>;
+                                               iommus = <&apps_smmu 0x1965 0x0>,
+                                                        <&apps_smmu 0x0c25 0x0>,
+                                                        <&apps_smmu 0x0c05 0x40>,
+                                                        <&apps_smmu 0x19c5 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@6 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <6>;
+                                               iommus = <&apps_smmu 0x1966 0x0>,
+                                                        <&apps_smmu 0x0c06 0x20>,
+                                                        <&apps_smmu 0x0c46 0x0>,
+                                                        <&apps_smmu 0x19c6 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@7 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <7>;
+                                               iommus = <&apps_smmu 0x1967 0x0>,
+                                                        <&apps_smmu 0x0c27 0x0>,
+                                                        <&apps_smmu 0x0c07 0x40>,
+                                                        <&apps_smmu 0x19c7 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@8 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <8>;
+                                               iommus = <&apps_smmu 0x1968 0x0>,
+                                                        <&apps_smmu 0x0c08 0x20>,
+                                                        <&apps_smmu 0x0c48 0x0>,
+                                                        <&apps_smmu 0x19c8 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       /* note: secure cb9 in downstream */
+
+                                       compute-cb@12 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <12>;
+                                               iommus = <&apps_smmu 0x196c 0x0>,
+                                                        <&apps_smmu 0x0c2c 0x20>,
+                                                        <&apps_smmu 0x0c0c 0x40>,
+                                                        <&apps_smmu 0x19cc 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@13 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <13>;
+                                               iommus = <&apps_smmu 0x196d 0x0>,
+                                                        <&apps_smmu 0x0c0d 0x20>,
+                                                        <&apps_smmu 0x0c2e 0x0>,
+                                                        <&apps_smmu 0x0c4d 0x0>,
+                                                        <&apps_smmu 0x19cd 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@14 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <14>;
+                                               iommus = <&apps_smmu 0x196e 0x0>,
+                                                        <&apps_smmu 0x0c0e 0x20>,
+                                                        <&apps_smmu 0x19ce 0x0>;
+                                               dma-coherent;
+                                       };
+                               };
+                       };
+               };
        };
 
        timer {