]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
powerpc64/bpf: Support internal-only MOV instruction to resolve per-CPU addrs
authorSaket Kumar Bhaskar <skb99@linux.ibm.com>
Wed, 10 Dec 2025 06:50:32 +0000 (12:20 +0530)
committerMadhavan Srinivasan <maddy@linux.ibm.com>
Wed, 7 Jan 2026 04:02:40 +0000 (09:32 +0530)
With the introduction of commit 7bdbf7446305 ("bpf: add special
internal-only MOV instruction to resolve per-CPU addrs"),
a new BPF instruction BPF_MOV64_PERCPU_REG has been added to
resolve absolute addresses of per-CPU data from their per-CPU
offsets. This update requires enabling support for this
instruction in the powerpc JIT compiler.

As of commit 7a0268fa1a36 ("[PATCH] powerpc/64: per cpu data
optimisations"), the per-CPU data offset for the CPU is stored in
the paca.

To support this BPF instruction in the powerpc JIT, the following
powerpc instructions are emitted:
if (IS_ENABLED(CONFIG_SMP))
ld tmp1_reg, 48(13) //Load per-CPU data offset from paca(r13) in tmp1_reg.
add dst_reg, src_reg, tmp1_reg //Add the per cpu offset to the dst.
else if (src_reg != dst_reg)
mr dst_reg, src_reg //Move src_reg to dst_reg, if src_reg != dst_reg

To evaluate the performance improvements introduced by this change,
the benchmark described in [1] was employed.

Before Change:
glob-arr-inc   :   41.580 ± 0.034M/s
arr-inc        :   39.592 ± 0.055M/s
hash-inc       :   25.873 ± 0.012M/s

After Change:
glob-arr-inc   :   42.024 ± 0.049M/s
arr-inc        :   55.447 ± 0.031M/s
hash-inc       :   26.565 ± 0.014M/s

[1] https://github.com/anakryiko/linux/commit/8dec900975ef

Reviewed-by: Puranjay Mohan <puranjay@kernel.org>
Signed-off-by: Saket Kumar Bhaskar <skb99@linux.ibm.com>
Acked-by: Hari Bathini <hbathini@linux.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/667fdaa19c1564141f6cd82e75b2be86a42c0f96.1765343385.git.skb99@linux.ibm.com
arch/powerpc/net/bpf_jit_comp.c
arch/powerpc/net/bpf_jit_comp64.c

index 5e976730b2f5f51cfe87b3cef30860da30857ed4..d53e9cd7563fb7d067d1e8ea4ab34617592b9aef 100644 (file)
@@ -466,6 +466,11 @@ bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)
        return true;
 }
 
+bool bpf_jit_supports_percpu_insn(void)
+{
+       return IS_ENABLED(CONFIG_PPC64);
+}
+
 void *arch_alloc_bpf_trampoline(unsigned int size)
 {
        return bpf_prog_pack_alloc(size, bpf_jit_fill_ill_insns);
index 1fe37128c87640dd61d3debdd3596884f2e2f9f2..37723ee9344ed72d8a51462081c76ece03b145cf 100644 (file)
@@ -918,6 +918,16 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code
                case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
                case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
 
+                       if (insn_is_mov_percpu_addr(&insn[i])) {
+                               if (IS_ENABLED(CONFIG_SMP)) {
+                                       EMIT(PPC_RAW_LD(tmp1_reg, _R13, offsetof(struct paca_struct, data_offset)));
+                                       EMIT(PPC_RAW_ADD(dst_reg, src_reg, tmp1_reg));
+                               } else if (src_reg != dst_reg) {
+                                       EMIT(PPC_RAW_MR(dst_reg, src_reg));
+                               }
+                               break;
+                       }
+
                        if (insn_is_cast_user(&insn[i])) {
                                EMIT(PPC_RAW_RLDICL_DOT(tmp1_reg, src_reg, 0, 32));
                                PPC_LI64(dst_reg, (ctx->user_vm_start & 0xffffffff00000000UL));