re PR target/60562 (FAIL: gcc.target/i386/excess-precision-3.c execution test after...

PR target/60562

        * config/i386/i386.md (*float<SWI48x><MODEF>2_i387): Move down to
        be shadowed by *float<SWI48><MODEF>2_sse.  Test X87_ENABLE_FLOAT.

From-SVN: r208662

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 520b1894d25e647eced92d5772736d7cc8c870bb..e33cb61a5accd2defe76074aef44b8e567e8f457 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-03-18  Richard Henderson  <rth@redhat.com>
+
+       PR target/60562
+       * config/i386/i386.md (*float<SWI48x><MODEF>2_i387): Move down to
+       be shadowed by *float<SWI48><MODEF>2_sse.  Test X87_ENABLE_FLOAT.
 
 2014-03-18  Basile Starynkevitch  <basile@starynkevitch.net>
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a824e78d3946849b595f18c4b9c8a683b3fb5672..abc22f234e008603bc5767863139b554254c1e03 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4701,15 +4701,6 @@
     }
 })
 
-(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"
-  [(set (match_operand:MODEF 0 "register_operand" "=f")
-       (float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand" "m")))]
-  "TARGET_80387 && !(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)"
-  "fild%Z1\t%1"
-  [(set_attr "type" "fmov")
-   (set_attr "mode" "<MODEF:MODE>")
-   (set_attr "fp_int_src" "true")])
-
 (define_insn "*float<SWI48:mode><MODEF:mode>2_sse"
   [(set (match_operand:MODEF 0 "register_operand" "=f,x,x")
        (float:MODEF
@@ -4743,6 +4734,15 @@
            (symbol_ref "true")))
    ])
 
+(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"
+  [(set (match_operand:MODEF 0 "register_operand" "=f")
+       (float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand" "m")))]
+  "TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48x:MODE>mode)"
+  "fild%Z1\t%1"
+  [(set_attr "type" "fmov")
+   (set_attr "mode" "<MODEF:MODE>")
+   (set_attr "fp_int_src" "true")])
+
 ;; Try TARGET_USE_VECTOR_CONVERTS, but not so hard as to require extra memory
 ;; slots when !TARGET_INTER_UNIT_MOVES_TO_VEC disables the general_regs
 ;; alternative in sse2_loadld.