(clobber (reg:CC FLAGS_REG))])]
"split_double_mode (<DWI>mode, &operands[0], 2, &operands[0], &operands[2]);")
+;; Convert:
+;; mov %esi, %edx
+;; negl %eax
+;; adcl $0, %edx
+;; negl %edx
+;; to:
+;; xorl %edx, %edx
+;; negl %eax
+;; sbbl %esi, %edx
+
+(define_peephole2
+ [(set (match_operand:SWI48 0 "general_reg_operand")
+ (match_operand:SWI48 1 "nonimmediate_gr_operand"))
+ (parallel
+ [(set (reg:CCC FLAGS_REG)
+ (ne:CCC (match_operand:SWI48 2 "general_reg_operand") (const_int 0)))
+ (set (match_dup 2) (neg:SWI48 (match_dup 2)))])
+ (parallel
+ [(set (match_dup 0)
+ (plus:SWI48 (plus:SWI48
+ (ltu:SWI48 (reg:CC FLAGS_REG) (const_int 0))
+ (match_dup 0))
+ (const_int 0)))
+ (clobber (reg:CC FLAGS_REG))])
+ (parallel
+ [(set (match_dup 0)
+ (neg:SWI48 (match_dup 0)))
+ (clobber (reg:CC FLAGS_REG))])]
+ "REGNO (operands[0]) != REGNO (operands[2])
+ && !reg_mentioned_p (operands[0], operands[1])
+ && !reg_mentioned_p (operands[2], operands[1])"
+ [(parallel
+ [(set (reg:CCC FLAGS_REG)
+ (ne:CCC (match_dup 2) (const_int 0)))
+ (set (match_dup 2) (neg:SWI48 (match_dup 2)))])
+ (parallel
+ [(set (match_dup 0)
+ (minus:SWI48 (minus:SWI48
+ (match_dup 0)
+ (ltu:SWI48 (reg:CC FLAGS_REG) (const_int 0)))
+ (match_dup 1)))
+ (clobber (reg:CC FLAGS_REG))])]
+ "ix86_expand_clear (operands[0]);")
+
(define_insn "*neg<mode>_1"
[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
(neg:SWI (match_operand:SWI 1 "nonimmediate_operand" "0")))