s390/percpu: Use new percpu code section for arch_this_cpu_add_return()

Convert arch_this_cpu_add_return() to make use of the new percpu code
section infrastructure.

With this the text size of the kernel image is reduced by ~4k
(defconfig). Also 66 generated preempt_schedule_notrace() function
calls within the kernel image (modules not counted) are removed.

Acked-by: Alexander Gordeev <agordeev@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>

diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h
index 9140d81b7efce0e983bf00274f19f7e45a390ef4..f2d0e035458222f91418745cd43439d6fc8e3095 100644 (file)
--- a/arch/s390/include/asm/percpu.h
+++ b/arch/s390/include/asm/percpu.h
@@ -185,17 +185,29 @@ do {                                                                              \
 
 #define arch_this_cpu_add_return(pcp, val, op)                         \
 ({                                                                     \
+       unsigned long lc_pcpr, lc_pcpo;                                 \
        typedef typeof(pcp) pcp_op_T__;                                 \
        pcp_op_T__ val__ = (val);                                       \
        pcp_op_T__ old__, *ptr__;                                       \
-       preempt_disable_notrace();                                      \
-       ptr__ = raw_cpu_ptr(&(pcp));                                    \
-       asm volatile(                                                   \
-               op "    %[old__],%[val__],%[ptr__]"                     \
-               : [old__] "=d" (old__), [ptr__] "+Q" (*ptr__)           \
-               : [val__] "d" (val__)                                   \
+                                                                       \
+       lc_pcpr = offsetof(struct lowcore, percpu_register);            \
+       lc_pcpo = offsetof(struct lowcore, percpu_offset);              \
+       ptr__ = PERCPU_PTR(&(pcp));                                     \
+       asm_inline volatile(                                            \
+               MVIY_PERCPU("%[disppcpr]", "%[dispaltpcpr]", "%[ptr__]")\
+               AG_ALT("%[disppcpo]", "%[dispaltpcpo]", "%[ptr__]")     \
+               op "    %[old__],%[val__],0(%[ptr__])\n"                \
+               MVIY_ALT("%[disppcpr]", "%[dispaltpcpr]")               \
+               : [old__] "=&d" (old__),                                \
+                 [ptr__] "+&a" (ptr__), "+m" (*ptr__),                 \
+                 "=m" (((struct lowcore *)0)->percpu_register)         \
+               : [val__] "d" (val__),                                  \
+                 [disppcpr] "i" (lc_pcpr),                             \
+                 [disppcpo] "i" (lc_pcpo),                             \
+                 [dispaltpcpr] "i" (lc_pcpr + LOWCORE_ALT_ADDRESS),    \
+                 [dispaltpcpo] "i" (lc_pcpo + LOWCORE_ALT_ADDRESS),    \
+                 "m" (((struct lowcore *)0)->percpu_offset)            \
                : "cc");                                                \
-       preempt_enable_notrace();                                               \
        old__ + val__;                                                  \
 })