/* ap is replaced with an address like base+offset by lra,
where offset is larger than s9, resulting into an ICE. */
-typedef struct { char a[500] } b;
-c;
+typedef struct { char a[500]; } b;
+int c;
struct d {
short e;
- b f
-} g(int h, int i, int j, int k, char l, int m, int n, char *p) {
+ b f;
+};
+
+int q (struct d);
+
+struct d g(int h, int i, int j, int k, char l, int m, int n, char *p) {
again:;
struct d o;
*p = c = ({ q(o); });
/* { dg-do compile } */
/* { dg-skip-if "" { ! { clmcpu } } } */
-/* { dg-options "-mcpu=archs -Os -w -fpic" } */
+/* { dg-options "-mcpu=archs -Os -w -fpic -fpermissive" } */
/* tst_movb split pattern is wrong for anything else than NPS
chip. */