arm64: dts: renesas: rzt2h-rzn2h-evk: Reorder ADC nodes

Reorder the ADC nodes in the dts/i files so they follow the same
alphabetical ordering used elsewhere in these files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260115122210.3971063-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
index eedea1ce57e6751a45c0beb951106a7e98283dd3..e9639bbb2d703bd9404c5c4e2174ea634266647b 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
@@ -171,6 +171,34 @@
        };
 };
 
+&adc2 {
+       status = "okay";
+
+       channel@0 {
+               reg = <0x0>;
+       };
+
+       channel@1 {
+               reg = <0x1>;
+       };
+
+       channel@2 {
+               reg = <0x2>;
+       };
+
+       channel@3 {
+               reg = <0x3>;
+       };
+
+       channel@4 {
+               reg = <0x4>;
+       };
+
+       channel@5 {
+               reg = <0x5>;
+       };
+};
+
 &canfd {
        pinctrl-0 = <&can0_pins>;
        pinctrl-names = "default";
@@ -310,30 +338,3 @@
        };
 };
 
-&adc2 {
-       status = "okay";
-
-       channel@0 {
-               reg = <0x0>;
-       };
-
-       channel@1 {
-               reg = <0x1>;
-       };
-
-       channel@2 {
-               reg = <0x2>;
-       };
-
-       channel@3 {
-               reg = <0x3>;
-       };
-
-       channel@4 {
-               reg = <0x4>;
-       };
-
-       channel@5 {
-               reg = <0x5>;
-       };
-};

diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
index 5d1da4de8af6662b8a0c09874de71072a789eea6..19f0a2c06753065c7fcafcb7aceb5a23f871f843 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts
@@ -210,6 +210,70 @@
        };
 };
 
+&adc2 {
+       status = "okay";
+
+       channel@0 {
+               reg = <0x0>;
+       };
+
+       channel@1 {
+               reg = <0x1>;
+       };
+
+       channel@2 {
+               reg = <0x2>;
+       };
+
+       channel@3 {
+               reg = <0x3>;
+       };
+
+       channel@4 {
+               reg = <0x4>;
+       };
+
+       channel@5 {
+               reg = <0x5>;
+       };
+
+       channel@6 {
+               reg = <0x6>;
+       };
+
+       channel@7 {
+               reg = <0x7>;
+       };
+
+       channel@8 {
+               reg = <0x8>;
+       };
+
+       channel@9 {
+               reg = <0x9>;
+       };
+
+       channel@a {
+               reg = <0xa>;
+       };
+
+       channel@b {
+               reg = <0xb>;
+       };
+
+       channel@c {
+               reg = <0xc>;
+       };
+
+       channel@d {
+               reg = <0xd>;
+       };
+
+       channel@e {
+               reg = <0xe>;
+       };
+};
+
 #if CANFD_ENABLE
 &canfd {
        pinctrl-0 = <&can1_pins>;
@@ -368,66 +432,3 @@
        };
 };
 
-&adc2 {
-       status = "okay";
-
-       channel@0 {
-               reg = <0x0>;
-       };
-
-       channel@1 {
-               reg = <0x1>;
-       };
-
-       channel@2 {
-               reg = <0x2>;
-       };
-
-       channel@3 {
-               reg = <0x3>;
-       };
-
-       channel@4 {
-               reg = <0x4>;
-       };
-
-       channel@5 {
-               reg = <0x5>;
-       };
-
-       channel@6 {
-               reg = <0x6>;
-       };
-
-       channel@7 {
-               reg = <0x7>;
-       };
-
-       channel@8 {
-               reg = <0x8>;
-       };
-
-       channel@9 {
-               reg = <0x9>;
-       };
-
-       channel@a {
-               reg = <0xa>;
-       };
-
-       channel@b {
-               reg = <0xb>;
-       };
-
-       channel@c {
-               reg = <0xc>;
-       };
-
-       channel@d {
-               reg = <0xd>;
-       };
-
-       channel@e {
-               reg = <0xe>;
-       };
-};

diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
index 63bd91690b5401162d743e95811342a144c1cf64..510399febf2956cbcf95ab5ba86bb6a6311165bc 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
@@ -69,6 +69,85 @@
 #endif
 };
 
+/*
+ * ADC0 AN000 can be connected to a potentiometer on the board or
+ * exposed on ADC header.
+ *
+ * T2H:
+ * SW17[1] = ON, SW17[2] = OFF - Potentiometer
+ * SW17[1] = OFF, SW17[2] = ON  - CN41 header
+ * N2H:
+ * DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
+ * DSW6[1] = ON, DSW6[2] = OFF - CN3 header
+ */
+&adc0 {
+       status = "okay";
+
+       channel@0 {
+               reg = <0x0>;
+       };
+
+       channel@1 {
+               reg = <0x1>;
+       };
+
+       channel@2 {
+               reg = <0x2>;
+       };
+
+       channel@3 {
+               reg = <0x3>;
+       };
+};
+
+/*
+ * ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
+ *
+ * T2H:
+ * SW18[1] = ON, SW18[2] = OFF - CN42 header
+ * SW18[1] = OFF, SW18[2] = ON - mikroBUS
+ * N2H:
+ * DSW6[3] = ON, DSW6[4] = OFF - CN4 header
+ * DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
+ *
+ * ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
+ *
+ * T2H:
+ * SW18[3] = ON, SW18[4] = OFF - CN42 header
+ * SW18[3] = OFF, SW18[4] = ON - Grove2
+ * N2H:
+ * DSW6[5] = ON, DSW6[6] = OFF - CN4 header
+ * DSW6[5] = OFF, DSW6[6] = ON - Grove2
+ *
+ * ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
+ *
+ * T2H:
+ * SW18[5] = ON, SW18[6] = OFF - CN42 header
+ * SW18[5] = OFF, SW18[6] = ON - Grove2
+ * N2H:
+ * DSW6[7] = ON, DSW6[8] = OFF - CN4 header
+ * DSW6[7] = OFF, DSW6[8] = ON - Grove2
+ */
+&adc1 {
+       status = "okay";
+
+       channel@0 {
+               reg = <0x0>;
+       };
+
+       channel@1 {
+               reg = <0x1>;
+       };
+
+       channel@2 {
+               reg = <0x2>;
+       };
+
+       channel@3 {
+               reg = <0x3>;
+       };
+};
+
 &ehci {
        dr_mode = "otg";
        status = "okay";
@@ -315,81 +394,3 @@
        timeout-sec = <60>;
 };
 
-/*
- * ADC0 AN000 can be connected to a potentiometer on the board or
- * exposed on ADC header.
- *
- * T2H:
- * SW17[1] = ON, SW17[2] = OFF - Potentiometer
- * SW17[1] = OFF, SW17[2] = ON  - CN41 header
- * N2H:
- * DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
- * DSW6[1] = ON, DSW6[2] = OFF - CN3 header
- */
-&adc0 {
-       status = "okay";
-
-       channel@0 {
-               reg = <0x0>;
-       };
-
-       channel@1 {
-               reg = <0x1>;
-       };
-
-       channel@2 {
-               reg = <0x2>;
-       };
-
-       channel@3 {
-               reg = <0x3>;
-       };
-};
-
-/*
- * ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
- *
- * T2H:
- * SW18[1] = ON, SW18[2] = OFF - CN42 header
- * SW18[1] = OFF, SW18[2] = ON - mikroBUS
- * N2H:
- * DSW6[3] = ON, DSW6[4] = OFF - CN4 header
- * DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
- *
- * ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
- *
- * T2H:
- * SW18[3] = ON, SW18[4] = OFF - CN42 header
- * SW18[3] = OFF, SW18[4] = ON - Grove2
- * N2H:
- * DSW6[5] = ON, DSW6[6] = OFF - CN4 header
- * DSW6[5] = OFF, DSW6[6] = ON - Grove2
- *
- * ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
- *
- * T2H:
- * SW18[5] = ON, SW18[6] = OFF - CN42 header
- * SW18[5] = OFF, SW18[6] = ON - Grove2
- * N2H:
- * DSW6[7] = ON, DSW6[8] = OFF - CN4 header
- * DSW6[7] = OFF, DSW6[8] = ON - Grove2
- */
-&adc1 {
-       status = "okay";
-
-       channel@0 {
-               reg = <0x0>;
-       };
-
-       channel@1 {
-               reg = <0x1>;
-       };
-
-       channel@2 {
-               reg = <0x2>;
-       };
-
-       channel@3 {
-               reg = <0x3>;
-       };
-};