target: [PR103750] Also handle avx512 kmask & immediate 15 or 3 when VF is 4/2.

Since the upper bits are already cleared by the comparison
instructions.

gcc/ChangeLog:
	PR target/103750
	* config/i386/sse.md (*<avx512>_cmp<mode>3_and15): New define_insn.
	(*<avx512>_ucmp<mode>3_and15): Ditto.
	(*<avx512>_cmp<mode>3_and3): Ditto.
	(*avx512vl_ucmpv2di3_and3): Ditto.
	(*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>):
	Change operands[3] predicate to <cmp_imm_predicate>.
	(*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2):
	Ditto.
	(*<avx512>_cmp<mode>3): Add GET_MODE_NUNITS (<MODE>mode) >= 8
	to the condition.
	(*<avx512>_ucmp<mode>3): Ditto.
	(V48_AVX512VL_4): New mode iterator.
	(VI48_AVX512VL_4): Ditto.
	(V8_AVX512VL_2): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512vl-pr103750-1.c: New test.
	* gcc.target/i386/avx512f-pr96891-3.c: Adjust testcase.
	* gcc.target/i386/avx512f-vpcmpgtuq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpeqq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpequq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpgeq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpgeuq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpgtq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpgtuq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpleq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpleuq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpltq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpltuq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpneqq-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcmpnequq-1.c: Ditto.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 20b35a1c6a3e4890642dd0065f2ba19e5bc34bbe..2ed348ced0dec642f1c6972fc12a10e0dcbb2760 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -527,6 +527,16 @@
    (V16SF "TARGET_EVEX512") (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
    (V8DF "TARGET_EVEX512") (V4DF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
 
+(define_mode_iterator V48_AVX512VL_4
+  [(V4SF "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
+   (V4SI "TARGET_AVX512VL") (V4DI "TARGET_AVX512VL")])
+
+(define_mode_iterator VI48_AVX512VL_4
+  [(V4SI "TARGET_AVX512VL") (V4DI "TARGET_AVX512VL")])
+
+(define_mode_iterator V8_AVX512VL_2
+  [(V2DF "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
+
 (define_mode_iterator VFH_AVX10_2
   [(V32HF "TARGET_AVX10_2") V16HF V8HF
    (V16SF "TARGET_AVX10_2") V8SF V4SF
@@ -4410,7 +4420,7 @@
          (unspec:<V48H_AVX512VL:avx512fmaskmode>
            [(match_operand:V48H_AVX512VL 1 "nonimmediate_operand" "v")
             (match_operand:V48H_AVX512VL 2 "nonimmediate_operand" "vm")
-            (match_operand:SI 3 "const_0_to_7_operand" "n")]
+            (match_operand:SI 3 "<cmp_imm_predicate>" "n")]
            UNSPEC_PCMP)))]
   "TARGET_AVX512F
    && (!VALID_MASK_AVX512BW_MODE (<SWI248x:MODE>mode) || TARGET_AVX512BW)
@@ -4428,7 +4438,7 @@
          (unspec:<V48H_AVX512VL:avx512fmaskmode>
            [(match_operand:V48H_AVX512VL 1 "nonimmediate_operand")
             (match_operand:V48H_AVX512VL 2 "nonimmediate_operand")
-            (match_operand:SI 3 "const_0_to_7_operand")]
+            (match_operand:SI 3 "<cmp_imm_predicate>")]
            UNSPEC_PCMP)))
    (set (match_operand:<V48H_AVX512VL:avx512fmaskmode> 4 "register_operand")
        (unspec:<V48H_AVX512VL:avx512fmaskmode>
@@ -4469,7 +4479,8 @@
             (match_operand:V48H_AVX512VL 2 "nonimmediate_operand")
             (match_operand:SI 3 "<cmp_imm_predicate>" "n")]
            UNSPEC_PCMP)))]
-  "TARGET_AVX512F && ix86_pre_reload_split ()"
+  "TARGET_AVX512F && GET_MODE_NUNITS (<MODE>mode) >= 8
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -4480,6 +4491,70 @@
           UNSPEC_PCMP))]
   "operands[4] = GEN_INT (INTVAL (operands[3]) ^ 4);")
 
+(define_insn "*<avx512>_cmp<mode>3_and15"
+  [(set (match_operand:QI 0 "register_operand" "=k")
+       (and:QI
+         (unspec:QI
+           [(match_operand:V48_AVX512VL_4 1 "nonimmediate_operand" "v")
+            (match_operand:V48_AVX512VL_4 2 "nonimmediate_operand" "vm")
+            (match_operand:SI 3 "<cmp_imm_predicate>" "n")]
+           UNSPEC_PCMP)
+         (const_int 15)))]
+  "TARGET_AVX512F"
+  "v<ssecmpintprefix>cmp<ssemodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  [(set_attr "type" "ssecmp")
+   (set_attr "length_immediate" "1")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "*<avx512>_ucmp<mode>3_and15"
+  [(set (match_operand:QI 0 "register_operand" "=k")
+       (and:QI
+         (unspec:QI
+           [(match_operand:VI48_AVX512VL_4 1 "nonimmediate_operand" "v")
+            (match_operand:VI48_AVX512VL_4 2 "nonimmediate_operand" "vm")
+            (match_operand:SI 3 "const_0_to_7_operand" "n")]
+           UNSPEC_UNSIGNED_PCMP)
+         (const_int 15)))]
+  "TARGET_AVX512F"
+  "vpcmpu<ssemodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  [(set_attr "type" "ssecmp")
+   (set_attr "length_immediate" "1")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "*<avx512>_cmp<mode>3_and3"
+  [(set (match_operand:QI 0 "register_operand" "=k")
+       (and:QI
+         (unspec:QI
+           [(match_operand:V8_AVX512VL_2 1 "nonimmediate_operand" "v")
+            (match_operand:V8_AVX512VL_2 2 "nonimmediate_operand" "vm")
+            (match_operand:SI 3 "<cmp_imm_predicate>" "n")]
+           UNSPEC_PCMP)
+         (const_int 3)))]
+  "TARGET_AVX512F"
+  "v<ssecmpintprefix>cmp<ssemodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  [(set_attr "type" "ssecmp")
+   (set_attr "length_immediate" "1")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "*avx512vl_ucmpv2di3_and3"
+  [(set (match_operand:QI 0 "register_operand" "=k")
+       (and:QI
+         (unspec:QI
+           [(match_operand:V2DI 1 "nonimmediate_operand" "v")
+            (match_operand:V2DI 2 "nonimmediate_operand" "vm")
+            (match_operand:SI 3 "const_0_to_7_operand" "n")]
+           UNSPEC_UNSIGNED_PCMP)
+         (const_int 3)))]
+  "TARGET_AVX512F"
+  "vpcmpuq\t{%3, %2, %1, %0|%0, %1, %2, %3}"
+  [(set_attr "type" "ssecmp")
+   (set_attr "length_immediate" "1")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "TI")])
+
 (define_insn "<avx512>_cmp<mode>3<mask_scalar_merge_name>"
   [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
        (unspec:<avx512fmaskmode>
@@ -4762,7 +4837,8 @@
             (match_operand:VI48_AVX512VL 2 "nonimmediate_operand")
             (match_operand:SI 3 "const_0_to_7_operand")]
            UNSPEC_UNSIGNED_PCMP)))]
-  "TARGET_AVX512F && ix86_pre_reload_split ()"
+  "TARGET_AVX512F && ix86_pre_reload_split ()
+   && GET_MODE_NUNITS (<MODE>mode) >= 8"
   "#"
   "&& 1"
   [(set (match_dup 0)

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c b/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c
index 5b260818cb3c76ef0f7a981405fc6a8896f2c2a7..5eb60d9064f0fd77b190b479ebd3641585aa0d2d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c
@@ -1,11 +1,10 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512vl -mavx512bw -mavx512dq -O2 -masm=att -mstv -mno-stackrealign" } */
 /* { dg-final { scan-assembler-not {not[bwlqd]\]} } } */
-/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$5} 4} } */
-/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$6} 4} } */
+/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$5} 2} } */
+/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$6} 3} } */
 /* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$[37]} 4} } */
-/* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$5} 2} } */
-/* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$6} 2} } */
+/* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$6} 1} } */
 /* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$7} 2} } */
 
 #include<immintrin.h>
@@ -20,20 +19,14 @@
 
 FOO (__m128i,, epi8, __mmask16, 128, 1);
 FOO (__m128i,, epi16, __mmask8, 128, 1);
-FOO (__m128i,, epi32, __mmask8, 128, 1);
-FOO (__m128i,, epi64, __mmask8, 128, 1);
 FOO (__m256i, 256, epi8, __mmask32, 256, 2);
 FOO (__m256i, 256, epi16, __mmask16, 256, 2);
 FOO (__m256i, 256, epi32, __mmask8, 256, 2);
-FOO (__m256i, 256, epi64, __mmask8, 256, 2);
 FOO (__m512i, 512, epi8, __mmask64, 512, 3);
 FOO (__m512i, 512, epi16, __mmask32, 512, 3);
 FOO (__m512i, 512, epi32, __mmask16, 512, 3);
 FOO (__m512i, 512, epi64, __mmask8, 512, 3);
 
-FOO (__m128,, ps, __mmask8, 128, 1);
-FOO (__m128d,, pd, __mmask8, 128, 1);
 FOO (__m256, 256, ps, __mmask8, 256, 2);
-FOO (__m256d, 256, pd, __mmask8, 256, 2);
 FOO (__m512, 512, ps, __mmask16, 512, 3);
 FOO (__m512d, 512, pd, __mmask8, 512, 3);

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c
index ef6a52575c155185fa2e86856cbd2273655fbcd3..37ca646af72d7cea4d912c288a60c1734a23066e 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c
@@ -12,5 +12,5 @@ void extern
 avx512f_test (void)
 {
   m = _mm512_cmpgt_epu64_mask (x, x);
-  m = _mm512_mask_cmpgt_epu64_mask (3, x, x);
+  m = _mm512_mask_cmpgt_epu64_mask (5, x, x);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-pr103750-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-pr103750-1.c
new file mode 100644 (file)
index 0000000..a15fae8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-pr103750-1.c
@@ -0,0 +1,79 @@
+/* PR target/103750 */
+/* { dg-do compile }  */
+/* { dg-options "-O2 -mavx512vl" } */
+/* { dg-final { scan-assembler-not "and" } } */
+
+#include <immintrin.h>
+extern __m128i* pi128;
+extern __m256i* pi256;
+
+extern __m128* ps128;
+extern __m256* ps256;
+
+extern __m128d* pd128;
+extern __m256d* pd256;
+
+extern char a;
+void
+foo ()
+{
+  __mmask8 mask1 = _mm_cmpeq_epu32_mask (pi128[0], pi128[1]);
+  a = mask1 & 15;
+}
+
+void
+foo1 ()
+{
+  __mmask8 mask1 = _mm_cmpeq_epu64_mask (pi128[0], pi128[1]);
+  a = mask1 & 3;
+}
+
+void
+foo2 ()
+{
+  __mmask8 mask1 = _mm256_cmpeq_epu64_mask (pi256[0], pi256[1]);
+  a = mask1 & 15;
+}
+
+void
+sign_foo ()
+{
+  __mmask8 mask1 = _mm_cmpeq_epi32_mask (pi128[0], pi128[1]);
+  a = mask1 & 15;
+}
+
+void
+sign_foo1 ()
+{
+  __mmask8 mask1 = _mm_cmpeq_epi64_mask (pi128[0], pi128[1]);
+  a = mask1 & 3;
+}
+
+
+void
+sign_foo2 ()
+{
+  __mmask8 mask1 = _mm256_cmpeq_epi64_mask (pi256[0], pi256[1]);
+  a = mask1 & 15;
+}
+
+void
+float_foo ()
+{
+  __mmask8 mask1 = _mm_cmp_ps_mask (ps128[0], ps128[1], 1);
+  a = mask1 & 15;
+}
+
+void
+double_foo ()
+{
+  __mmask8 mask1 = _mm_cmp_pd_mask (pd128[0], pd128[1], 1);
+  a = mask1 & 3;
+}
+
+void
+double_foo2 ()
+{
+  __mmask8 mask1 = _mm256_cmp_pd_mask (pd256[0], pd256[1], 1);
+  a = mask1 & 15;
+}

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c
index 69b200a6be729640bd1e2fb3d6aabdc628d3e227..a798d062953c37d28150c3bfd134d57e5df73d3c 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpeq_epi64_mask (x128, x128);
   m = _mm256_cmpeq_epi64_mask (x256, x256);
-  m = _mm_mask_cmpeq_epi64_mask (3, x128, x128);
-  m = _mm256_mask_cmpeq_epi64_mask (3, x256, x256);
+  m = _mm_mask_cmpeq_epi64_mask (5, x128, x128);
+  m = _mm256_mask_cmpeq_epi64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c
index c925d3226ecc378ab9c2d907b26b66958894993e..736763f121e71f76f7496dd52c582e8ac007d2bd 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpeq_epu64_mask (x128, x128);
   m = _mm256_cmpeq_epu64_mask (x256, x256);
-  m = _mm_mask_cmpeq_epu64_mask (3, x128, x128);
-  m = _mm256_mask_cmpeq_epu64_mask (3, x256, x256);
+  m = _mm_mask_cmpeq_epu64_mask (5, x128, x128);
+  m = _mm256_mask_cmpeq_epu64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c
index ef40e41fbe54a2a4034218ec19dc853d44f84db2..19110a506ca377e099acdbba6467e705f6b25249 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpge_epi64_mask (x128, x128);
   m = _mm256_cmpge_epi64_mask (x256, x256);
-  m = _mm_mask_cmpge_epi64_mask (3, x128, x128);
-  m = _mm256_mask_cmpge_epi64_mask (3, x256, x256);
+  m = _mm_mask_cmpge_epi64_mask (5, x128, x128);
+  m = _mm256_mask_cmpge_epi64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c
index 1f7dd49504ed1b13a249fc76a783a3378b5c2459..d82f8e506b66d059d7ff5ebeda38f4130c7b9bbc 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpge_epu64_mask (x128, x128);
   m = _mm256_cmpge_epu64_mask (x256, x256);
-  m = _mm_mask_cmpge_epu64_mask (3, x128, x128);
-  m = _mm256_mask_cmpge_epu64_mask (3, x256, x256);
+  m = _mm_mask_cmpge_epu64_mask (5, x128, x128);
+  m = _mm256_mask_cmpge_epu64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c
index 26cac3a1bad3bb67ec2ba4bf41078e8d5215f57f..79f94306a0655dbdc4f68c06d72b652d5128f6ec 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpgt_epi64_mask (x128, x128);
   m = _mm256_cmpgt_epi64_mask (x256, x256);
-  m = _mm_mask_cmpgt_epi64_mask (3, x128, x128);
-  m = _mm256_mask_cmpgt_epi64_mask (3, x256, x256);
+  m = _mm_mask_cmpgt_epi64_mask (5, x128, x128);
+  m = _mm256_mask_cmpgt_epi64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c
index 10717cd93cbf029951d0b1d70ece69fcdc64049e..bef015fe7e6dfb0d9b944cc1a5045007c8e0f0c4 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpgt_epu64_mask (x128, x128);
   m = _mm256_cmpgt_epu64_mask (x256, x256);
-  m = _mm_mask_cmpgt_epu64_mask (3, x128, x128);
-  m = _mm256_mask_cmpgt_epu64_mask (3, x256, x256);
+  m = _mm_mask_cmpgt_epu64_mask (5, x128, x128);
+  m = _mm256_mask_cmpgt_epu64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c
index 110ff70c0f8e554b80214c00ece375f7ad33dee3..9974aa5e7a9417373a6d54b84b278322b47e565e 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmple_epi64_mask (x128, x128);
   m = _mm256_cmple_epi64_mask (x256, x256);
-  m = _mm_mask_cmple_epi64_mask (3, x128, x128);
-  m = _mm256_mask_cmple_epi64_mask (3, x256, x256);
+  m = _mm_mask_cmple_epi64_mask (5, x128, x128);
+  m = _mm256_mask_cmple_epi64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c
index e3faf414fdacaa973f7d28b3eae8aeb403bcf2d7..0a5a5135dc49f2e9cf1e194ff87262e1184d2f1d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmple_epu64_mask (x128, x128);
   m = _mm256_cmple_epu64_mask (x256, x256);
-  m = _mm_mask_cmple_epu64_mask (3, x128, x128);
-  m = _mm256_mask_cmple_epu64_mask (3, x256, x256);
+  m = _mm_mask_cmple_epu64_mask (5, x128, x128);
+  m = _mm256_mask_cmple_epu64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c
index 1b8f7f1a75e1b5875492e87c1df8fa32e9625fcc..5f40c7974ff25a35e3043676cd9c7d6541b38599 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmplt_epi64_mask (x128, x128);
   m = _mm256_cmplt_epi64_mask (x256, x256);
-  m = _mm_mask_cmplt_epi64_mask (3, x128, x128);
-  m = _mm256_mask_cmplt_epi64_mask (3, x256, x256);
+  m = _mm_mask_cmplt_epi64_mask (5, x128, x128);
+  m = _mm256_mask_cmplt_epi64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c
index 5c2f025ca5ce9f67cdabfa3be543ecdf13f134ef..afda5e7665e978fa061e3bd083acde7f47b48ae8 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmplt_epu64_mask (x128, x128);
   m = _mm256_cmplt_epu64_mask (x256, x256);
-  m = _mm_mask_cmplt_epu64_mask (3, x128, x128);
-  m = _mm256_mask_cmplt_epu64_mask (3, x256, x256);
+  m = _mm_mask_cmplt_epu64_mask (5, x128, x128);
+  m = _mm256_mask_cmplt_epu64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c
index f48de102fbcbd7efc83c0196a8b05e7cbc544e78..5ef25484dd6373f99755a96b03a9ca03eadd9e09 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpneq_epi64_mask (x128, x128);
   m = _mm256_cmpneq_epi64_mask (x256, x256);
-  m = _mm_mask_cmpneq_epi64_mask (3, x128, x128);
-  m = _mm256_mask_cmpneq_epi64_mask (3, x256, x256);
+  m = _mm_mask_cmpneq_epi64_mask (5, x128, x128);
+  m = _mm256_mask_cmpneq_epi64_mask (5, x256, x256);
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c
index 726a88791b643ead60211f2dca7a12950e9f6f8c..4a9aacfd34ca89e3b43ea13422264fbe47d25441 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c
@@ -16,6 +16,6 @@ avx512vl_test (void)
 {
   m = _mm_cmpneq_epu64_mask (x128, x128);
   m = _mm256_cmpneq_epu64_mask (x256, x256);
-  m = _mm_mask_cmpneq_epu64_mask (3, x128, x128);
-  m = _mm256_mask_cmpneq_epu64_mask (3, x256, x256);
+  m = _mm_mask_cmpneq_epu64_mask (5, x128, x128);
+  m = _mm256_mask_cmpneq_epu64_mask (5, x256, x256);
 }