drm/amd/display: Wait until OTG enable state is cleared

[ Upstream commit e7496c15d830689cc4fc666b976c845ed2c5ed28 ]

[Why]
Customer reported an issue that OS starts and stops device multiple times
during driver installation. Frequently disabling and enabling OTG may
prevent OTG from being safely disabled and cause incorrect configuration
upon the next enablement.

[How]
Add a wait until OTG_CURRENT_MASTER_EN_STATE is cleared as a short term
solution.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: TungYu Lu <tungyu.lu@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c
index ff79c38287df1f85615c0693987afb937692ae3f..5af13706e6014b414f148275a28463ba0d283ef1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c
@@ -226,6 +226,11 @@ bool optc401_disable_crtc(struct timing_generator *optc)
        REG_UPDATE(CONTROL,
                        VTG0_ENABLE, 0);
 
+       // wait until CRTC_CURRENT_MASTER_EN_STATE == 0
+       REG_WAIT(OTG_CONTROL,
+                        OTG_CURRENT_MASTER_EN_STATE,
+                        0, 10, 15000);
+
        /* CRTC disabled, so disable  clock. */
        REG_WAIT(OTG_CLOCK_CONTROL,
                        OTG_BUSY, 0,