PCI: dwc: Replace certain BAR_RESERVED with BAR_DISABLED in glue drivers

Most DWC based EPC glue drivers that have BARs marked as BAR_RESERVED in
epc_features also call dw_pcie_ep_reset_bar() for these reserved BARs in
ep->ops->init(). (The only exception is pci-keystone.c.)

An EPF driver will be able to get/enable BARs that have been disabled/reset
using dw_pcie_ep_reset_bar(), except if the BAR is marked as BAR_RESERVED
(see pci_epc_get_next_free_bar()).

Thus, all EPC drivers that have BARs marked as BAR_RESERVED in epc_features
and call dw_pcie_ep_reset_bar(), should really have these BARs marked as
BAR_DISABLED. If dw_pcie_ep_reset_bar() is not called by the glue driver,
the BARs are kept as BAR_RESERVED.

No EPC drivers outside drivers/pci/controllers/dwc mark their BARs as
BAR_RESERVED, so there is nothing to do in non-DWC based EPC drivers.

Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Tested-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Tested-by: Koichiro Den <den@valinux.co.jp>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260312130229.2282001-18-cassel@kernel.org

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index a5b8d0b71677e052b3c6898f20cacd9598a3b17a..ec1e3557ca5356a51a8a774b963590c6e6fa5e90 100644 (file)
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -1433,19 +1433,19 @@ static int imx_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
 static const struct pci_epc_features imx8m_pcie_epc_features = {
        DWC_EPC_COMMON_FEATURES,
        .msi_capable = true,
-       .bar[BAR_1] = { .type = BAR_RESERVED, },
-       .bar[BAR_3] = { .type = BAR_RESERVED, },
+       .bar[BAR_1] = { .type = BAR_DISABLED, },
+       .bar[BAR_3] = { .type = BAR_DISABLED, },
        .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, },
-       .bar[BAR_5] = { .type = BAR_RESERVED, },
+       .bar[BAR_5] = { .type = BAR_DISABLED, },
        .align = SZ_64K,
 };
 
 static const struct pci_epc_features imx8q_pcie_epc_features = {
        DWC_EPC_COMMON_FEATURES,
        .msi_capable = true,
-       .bar[BAR_1] = { .type = BAR_RESERVED, },
-       .bar[BAR_3] = { .type = BAR_RESERVED, },
-       .bar[BAR_5] = { .type = BAR_RESERVED, },
+       .bar[BAR_1] = { .type = BAR_DISABLED, },
+       .bar[BAR_3] = { .type = BAR_DISABLED, },
+       .bar[BAR_5] = { .type = BAR_DISABLED, },
        .align = SZ_64K,
 };
 

diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 20fa4dadb82afecc5c3beaf8c64f420e28907c3f..278d2dba1db08d5b387211ec037d686ab14d7b7b 100644 (file)
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -933,6 +933,18 @@ static const struct pci_epc_features ks_pcie_am654_epc_features = {
        DWC_EPC_COMMON_FEATURES,
        .msi_capable = true,
        .msix_capable = true,
+       /*
+        * TODO: This driver is the only DWC glue driver that had BAR_RESERVED
+        * BARs, but did not call dw_pcie_ep_reset_bar() for the reserved BARs.
+        *
+        * To not change the existing behavior, these BARs were not migrated to
+        * BAR_DISABLED. If this driver wants the BAR_RESERVED BARs to be
+        * disabled, it should migrate them to BAR_DISABLED.
+        *
+        * If they actually should be enabled, then the driver must also define
+        * what is behind these reserved BARs, see the definition of struct
+        * pci_epc_bar_rsvd_region.
+        */
        .bar[BAR_0] = { .type = BAR_RESERVED, },
        .bar[BAR_1] = { .type = BAR_RESERVED, },
        .bar[BAR_2] = { .type = BAR_RESIZABLE, },

diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
index a6912e85e4ddc3791c4e6f4b6d4df8c5f30f1851..9dd05bac22b9b7a68579e9932ab293fb890333e6 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c
+++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
@@ -422,10 +422,10 @@ static int rcar_gen4_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
 static const struct pci_epc_features rcar_gen4_pcie_epc_features = {
        DWC_EPC_COMMON_FEATURES,
        .msi_capable = true,
-       .bar[BAR_1] = { .type = BAR_RESERVED, },
-       .bar[BAR_3] = { .type = BAR_RESERVED, },
+       .bar[BAR_1] = { .type = BAR_DISABLED, },
+       .bar[BAR_3] = { .type = BAR_DISABLED, },
        .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256 },
-       .bar[BAR_5] = { .type = BAR_RESERVED, },
+       .bar[BAR_5] = { .type = BAR_DISABLED, },
        .align = SZ_1M,
 };
 

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index f1f70fb824b25f9bc8e99704b1cafb8eecc5a6b2..61b9771004da1b4a3871b358ff3755065f0cd0f4 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1993,10 +1993,10 @@ static const struct pci_epc_features tegra_pcie_epc_features = {
        .msi_capable = true,
        .bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M,
                        .only_64bit = true, },
-       .bar[BAR_2] = { .type = BAR_RESERVED, },
-       .bar[BAR_3] = { .type = BAR_RESERVED, },
-       .bar[BAR_4] = { .type = BAR_RESERVED, },
-       .bar[BAR_5] = { .type = BAR_RESERVED, },
+       .bar[BAR_2] = { .type = BAR_DISABLED, },
+       .bar[BAR_3] = { .type = BAR_DISABLED, },
+       .bar[BAR_4] = { .type = BAR_DISABLED, },
+       .bar[BAR_5] = { .type = BAR_DISABLED, },
        .align = SZ_64K,
 };
 

diff --git a/drivers/pci/controller/dwc/pcie-uniphier-ep.c b/drivers/pci/controller/dwc/pcie-uniphier-ep.c
index b7020131f6262d6cae00f4772908415264e05b43..d6ec6823e180c11f76ab74c5ec91f625e9ef64d5 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-uniphier-ep.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier-ep.c
@@ -427,8 +427,8 @@ static const struct uniphier_pcie_ep_soc_data uniphier_pro5_data = {
                .align = 1 << 16,
                .bar[BAR_0] = { .only_64bit = true, },
                .bar[BAR_2] = { .only_64bit = true, },
-               .bar[BAR_4] = { .type = BAR_RESERVED, },
-               .bar[BAR_5] = { .type = BAR_RESERVED, },
+               .bar[BAR_4] = { .type = BAR_DISABLED, },
+               .bar[BAR_5] = { .type = BAR_DISABLED, },
        },
 };