]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu: Support forcing MTYPE_RW
authorHarish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Sat, 14 Feb 2026 23:28:28 +0000 (18:28 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 17 Mar 2026 14:31:52 +0000 (10:31 -0400)
Set default value of module parameter amdgpu_mtype_local to -1. This
allows to force MTYPE_RW on ASICs where MTYPE_RW is not default.

v2: Fix SDMA get_vm_pte_pde MTYPE

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c
drivers/gpu/drm/amd/amdkfd/kfd_svm.c

index 03814a23eb540642f930c459238d7e982d16329b..9c50f054f1c1082519333163ed373bc53c130a77 100644 (file)
@@ -839,8 +839,8 @@ module_param_named_unsafe(no_queue_eviction_on_vm_fault, amdgpu_no_queue_evictio
 /**
  * DOC: mtype_local (int)
  */
-int amdgpu_mtype_local;
-MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (0 = MTYPE_RW (default), 1 = MTYPE_NC, 2 = MTYPE_CC)");
+int amdgpu_mtype_local = -1;
+MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (default: ASIC dependent, 0 = MTYPE_RW, 1 = MTYPE_NC, 2 = MTYPE_CC)");
 module_param_named_unsafe(mtype_local, amdgpu_mtype_local, int, 0444);
 
 /**
index bc86e6c8e063ab2885daf4fa5c8975b8f48ad0c8..5e3102d072c4c8b2c1cae4e3c765bf5182a2998a 100644 (file)
@@ -534,13 +534,16 @@ static void gmc_v12_1_get_coherence_flags(struct amdgpu_device *adev,
 
                mtype_local = is_aid_a1 ? MTYPE_RW : MTYPE_NC;
                mtype_remote = is_aid_a1 ? MTYPE_NC : MTYPE_UC;
-               if (amdgpu_mtype_local == 1) {
+               if (amdgpu_mtype_local == 0) {
+                       DRM_INFO_ONCE("Using MTYPE_RW for local memory\n");
+                       mtype_local = MTYPE_RW;
+               } else if (amdgpu_mtype_local == 1) {
                        DRM_INFO_ONCE("Using MTYPE_NC for local memory\n");
                        mtype_local = MTYPE_NC;
                } else if (amdgpu_mtype_local == 2) {
-                       DRM_INFO_ONCE("MTYPE_CC not supported, using MTYPE_RW instead for local memory\n");
+                       DRM_INFO_ONCE("MTYPE_CC not supported, using %s for local memory\n", is_aid_a1 ? "MTYPE_RW" : "MTYPE_NC");
                } else {
-                       DRM_INFO_ONCE("Using MTYPE_RW for local memory\n");
+                       DRM_INFO_ONCE("Using %s for local memory\n", is_aid_a1 ? "MTYPE_RW" : "MTYPE_NC");
                }
 
                is_local = (is_vram && adev == bo_adev);
index 03bf1f86098f109c68712d8d674bf8db6b19ea64..f20e0fc3fc7431abc1d30b5e90d0918356a5bceb 100644 (file)
@@ -1129,12 +1129,21 @@ static void sdma_v7_1_vm_set_pte_pde(struct amdgpu_ib *ib,
        /* for physically contiguous pages (vram) */
        u32 header = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_PTEPDE);
 
-       if (amdgpu_mtype_local)
-               header |= SDMA_PKT_PTEPDE_COPY_HEADER_MTYPE(0x3);
-       else
-               header |= (SDMA_PKT_PTEPDE_COPY_HEADER_MTYPE(0x2) |
-                          SDMA_PKT_PTEPDE_COPY_HEADER_SNOOP(0x1) |
-                          SDMA_PKT_PTEPDE_COPY_HEADER_SCOPE(0x3));
+       /* TODO:
+        * When VM_L2_CNTL5.WALKER_FETCH_PDE_MTYPE_ENABLE is enabled, change below MTYPE
+        * to RW for AID A1 and UC for AID A0. NC needs additional GCR flush and need not
+        * be supported. Also, honour amdgpu_mtype_local override. RW would additionally
+        * require setting SCOPE bits in the header.
+        *
+        * header |= (SDMA_PKT_PTEPDE_COPY_HEADER_MTYPE(0x2:RW) |
+        *           SDMA_PKT_PTEPDE_COPY_HEADER_SNOOP(0x1) |
+        *           SDMA_PKT_PTEPDE_COPY_HEADER_SCOPE(0x3:SYS_SCOPE));
+        */
+
+       /* VM_L2_CNTL5.WALKER_FETCH_PDE_MTYPE_ENABLE is 0 which defaults to UC. So,
+        * use MTYPE_UC (0x3). For ref. MTYPE_RW=0x2 MTYPE_NC=0x0
+        */
+       header |= SDMA_PKT_PTEPDE_COPY_HEADER_MTYPE(0x3) | SDMA_PKT_PTEPDE_COPY_HEADER_SNOOP(0x1);
 
        ib->ptr[ib->length_dw++] = header;
        ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */
index 1aea31c007fd82faf0d36091d0d8a6a6e2cc2f28..6e833e685dd0ba68bc5d3ff3c26ab1b71760bbfa 100644 (file)
@@ -1311,9 +1311,9 @@ svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm,
                bool is_local = (domain == SVM_RANGE_VRAM_DOMAIN) &&
                                (bo_node->adev == node->adev);
 
-               mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
-                                                       is_aid_a1 ?
-                                                       AMDGPU_VM_MTYPE_RW : AMDGPU_VM_MTYPE_NC;
+               mtype_local = amdgpu_mtype_local == 0 ? AMDGPU_VM_MTYPE_RW :
+                               amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
+                               is_aid_a1 ? AMDGPU_VM_MTYPE_RW : AMDGPU_VM_MTYPE_NC;
                mtype_remote = is_aid_a1 ? AMDGPU_VM_MTYPE_NC : AMDGPU_VM_MTYPE_UC;
                snoop = true;