net: dsa: b53: mmap: Implement bcm63xx ephy power control

Implement the phy enable/disable calls for b53 mmap, and
set the power down registers in the ephy control register
appropriately.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20250724035300.20497-8-kylehendrydev@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index 8f5914e2a7908ca21da06928ab637bcaf5c6c8a4..f06c3e0cc42a56704684b7ac558b42e1142567c4 100644 (file)
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -24,9 +24,12 @@
 #include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/b53.h>
+#include <linux/regmap.h>
 
 #include "b53_priv.h"
 
+#define BCM63XX_EPHY_REG 0x3C
+
 struct b53_phy_info {
        u32 ephy_enable_mask;
        u32 ephy_port_mask;
@@ -38,6 +41,7 @@ struct b53_mmap_priv {
        void __iomem *regs;
        struct regmap *gpio_ctrl;
        const struct b53_phy_info *phy_info;
+       u32 phys_enabled;
 };
 
 static const u32 bcm6318_ephy_offsets[] = {4, 5, 6, 7};
@@ -266,6 +270,50 @@ static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,
        return -EIO;
 }
 
+static int bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)
+{
+       struct b53_mmap_priv *priv = dev->priv;
+       const struct b53_phy_info *info = priv->phy_info;
+       struct regmap *gpio_ctrl = priv->gpio_ctrl;
+       u32 mask, val;
+
+       if (enable) {
+               mask = (info->ephy_enable_mask << info->ephy_offset[port])
+                               | BIT(info->ephy_bias_bit);
+               val = 0;
+       } else {
+               mask = (info->ephy_enable_mask << info->ephy_offset[port]);
+               if (!((priv->phys_enabled & ~BIT(port)) & info->ephy_port_mask))
+                       mask |= BIT(info->ephy_bias_bit);
+               val = mask;
+       }
+       return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
+}
+
+static void b53_mmap_phy_enable(struct b53_device *dev, int port)
+{
+       struct b53_mmap_priv *priv = dev->priv;
+       int ret = 0;
+
+       if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
+               ret = bcm63xx_ephy_set(dev, port, true);
+
+       if (!ret)
+               priv->phys_enabled |= BIT(port);
+}
+
+static void b53_mmap_phy_disable(struct b53_device *dev, int port)
+{
+       struct b53_mmap_priv *priv = dev->priv;
+       int ret = 0;
+
+       if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
+               ret = bcm63xx_ephy_set(dev, port, false);
+
+       if (!ret)
+               priv->phys_enabled &= ~BIT(port);
+}
+
 static const struct b53_io_ops b53_mmap_ops = {
        .read8 = b53_mmap_read8,
        .read16 = b53_mmap_read16,
@@ -279,6 +327,8 @@ static const struct b53_io_ops b53_mmap_ops = {
        .write64 = b53_mmap_write64,
        .phy_read16 = b53_mmap_phy_read16,
        .phy_write16 = b53_mmap_phy_write16,
+       .phy_enable = b53_mmap_phy_enable,
+       .phy_disable = b53_mmap_phy_disable,
 };
 
 static int b53_mmap_probe_of(struct platform_device *pdev,