arm64: dts: qcom: x1e80100: Move CPU idle states to their respective PSCI PDs

To make things uniform with other Qualcomm platforms, move the CPU idle
states under their PSCI power domains. No functional change.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251010-topic-x1e_dt_idle-v1-1-b1c8d558e635@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index b4f640c421e2f84dd92e2f7ef3f7e22e81ad3b96..5f6f04857cc6816fe6ca740f46f9105f62cdd053 100644 (file)
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -75,7 +75,6 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
 
                        l2_0: l2-cache {
                                compatible = "cache";
@@ -92,7 +91,6 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu2: cpu@200 {
@@ -103,7 +101,6 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd2>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu3: cpu@300 {
@@ -114,7 +111,6 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd3>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu4: cpu@10000 {
@@ -125,7 +121,6 @@
                        next-level-cache = <&l2_1>;
                        power-domains = <&cpu_pd4>, <&scmi_dvfs 1>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
 
                        l2_1: l2-cache {
                                compatible = "cache";
@@ -142,7 +137,6 @@
                        next-level-cache = <&l2_1>;
                        power-domains = <&cpu_pd5>, <&scmi_dvfs 1>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu6: cpu@10200 {
@@ -153,7 +147,6 @@
                        next-level-cache = <&l2_1>;
                        power-domains = <&cpu_pd6>, <&scmi_dvfs 1>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu7: cpu@10300 {
@@ -164,7 +157,6 @@
                        next-level-cache = <&l2_1>;
                        power-domains = <&cpu_pd7>, <&scmi_dvfs 1>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu8: cpu@20000 {
@@ -175,7 +167,6 @@
                        next-level-cache = <&l2_2>;
                        power-domains = <&cpu_pd8>, <&scmi_dvfs 2>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
 
                        l2_2: l2-cache {
                                compatible = "cache";
@@ -192,7 +183,6 @@
                        next-level-cache = <&l2_2>;
                        power-domains = <&cpu_pd9>, <&scmi_dvfs 2>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu10: cpu@20200 {
@@ -203,7 +193,6 @@
                        next-level-cache = <&l2_2>;
                        power-domains = <&cpu_pd10>, <&scmi_dvfs 2>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu11: cpu@20300 {
@@ -214,7 +203,6 @@
                        next-level-cache = <&l2_2>;
                        power-domains = <&cpu_pd11>, <&scmi_dvfs 2>;
                        power-domain-names = "psci", "perf";
-                       cpu-idle-states = <&cluster_c4>;
                };
 
                cpu-map {
@@ -371,61 +359,73 @@
                cpu_pd0: power-domain-cpu0 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd0>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd1: power-domain-cpu1 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd0>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd2: power-domain-cpu2 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd0>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd3: power-domain-cpu3 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd0>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd4: power-domain-cpu4 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd1>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd5: power-domain-cpu5 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd1>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd6: power-domain-cpu6 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd1>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd7: power-domain-cpu7 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd1>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd8: power-domain-cpu8 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd2>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd9: power-domain-cpu9 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd2>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd10: power-domain-cpu10 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd2>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cpu_pd11: power-domain-cpu11 {
                        #power-domain-cells = <0>;
                        power-domains = <&cluster_pd2>;
+                       domain-idle-states = <&cluster_c4>;
                };
 
                cluster_pd0: power-domain-cpu-cluster0 {