[PATCH 3/5] [RISC-V] Cost model for Zicond.

This patch implements a reasonable cost model for using Zicond to
implement conditional moves.  Essentially the Zicond insns are always
COSTS_N_INSNS (1).

Note there is still a problem with the costing model in general that
results in failure to if-convert as often as we should.  In simplest
terms the insn costing model sums the cost of the SET_SRC and the
cost of the SET_DEST.  Thus the conditional move is considered twice
as costly as it should be.  That will have to be addressed separately.

gcc/
	* config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
	using Zicond to implement some conditional moves.

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 8c474503080df8c665cb3af0b0e26142759a55d2..785e09c76ced8bf05b0ba74f8aea1b70363b6f42 100644 (file)
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2518,6 +2518,20 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN
          *total = COSTS_N_INSNS (1);
          return true;
        }
+      else if (TARGET_ZICOND
+              && outer_code == SET
+              && ((GET_CODE (XEXP (x, 1)) == REG
+                   && XEXP (x, 2) == CONST0_RTX (GET_MODE (XEXP (x, 1))))
+                  || (GET_CODE (XEXP (x, 2)) == REG
+                      && XEXP (x, 1) == CONST0_RTX (GET_MODE (XEXP (x, 2))))
+                  || (GET_CODE (XEXP (x, 1)) == REG
+                      && rtx_equal_p (XEXP (x, 1), XEXP (XEXP (x, 0), 0)))
+                  || (GET_CODE (XEXP (x, 1)) == REG
+                      && rtx_equal_p (XEXP (x, 2), XEXP (XEXP (x, 0), 0)))))
+       {
+         *total = COSTS_N_INSNS (1);
+         return true;
+       }
       else if (LABEL_REF_P (XEXP (x, 1)) && XEXP (x, 2) == pc_rtx)
        {
          if (equality_operator (XEXP (x, 0), mode)