]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amd/display: Defer BW-optimization-blocked DRR adjustments
authorJohn Olender <john.olender@gmail.com>
Wed, 16 Apr 2025 06:54:26 +0000 (02:54 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 29 May 2025 09:12:16 +0000 (11:12 +0200)
[ Upstream commit 874697e127931bf50a37ce9d96ee80f3a08a0c38 ]

[Why & How]
Instead of dropping DRR updates, defer them. This fixes issues where
monitor continues to see incorrect refresh rate after VRR was turned off
by userspace.

Fixes: 32953485c558 ("drm/amd/display: Do not update DRR while BW optimizations pending")
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3546
Reviewed-by: Sun peng Li <sunpeng.li@amd.com>
Signed-off-by: John Olender <john.olender@gmail.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 53761b7ecd83e6fbb9f2206f8c980a6aa308c844)
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/dc/core/dc.c

index 4a8d76a4f3ce6e9f920407c80aa7451b00966686..ee79a54de6d19581858be5c21074d0f591c6a690 100644 (file)
@@ -367,6 +367,8 @@ get_crtc_by_otg_inst(struct amdgpu_device *adev,
 static inline bool is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,
                                              struct dm_crtc_state *new_state)
 {
+       if (new_state->stream->adjust.timing_adjust_pending)
+               return true;
        if (new_state->freesync_config.state ==  VRR_STATE_ACTIVE_FIXED)
                return true;
        else if (amdgpu_dm_crtc_vrr_active(old_state) != amdgpu_dm_crtc_vrr_active(new_state))
index e70b097cf478d847b8f4b4f845f886f4ba87f13d..722175e347fdc67e04f1ca90403e6ecf7ddcbca4 100644 (file)
@@ -438,9 +438,12 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
         * Don't adjust DRR while there's bandwidth optimizations pending to
         * avoid conflicting with firmware updates.
         */
-       if (dc->ctx->dce_version > DCE_VERSION_MAX)
-               if (dc->optimized_required || dc->wm_optimized_required)
+       if (dc->ctx->dce_version > DCE_VERSION_MAX) {
+               if (dc->optimized_required || dc->wm_optimized_required) {
+                       stream->adjust.timing_adjust_pending = true;
                        return false;
+               }
+       }
 
        dc_exit_ips_for_hw_access(dc);
 
@@ -3130,7 +3133,8 @@ static void copy_stream_update_to_stream(struct dc *dc,
 
        if (update->crtc_timing_adjust) {
                if (stream->adjust.v_total_min != update->crtc_timing_adjust->v_total_min ||
-                       stream->adjust.v_total_max != update->crtc_timing_adjust->v_total_max)
+                       stream->adjust.v_total_max != update->crtc_timing_adjust->v_total_max ||
+                       stream->adjust.timing_adjust_pending)
                        update->crtc_timing_adjust->timing_adjust_pending = true;
                stream->adjust = *update->crtc_timing_adjust;
                update->crtc_timing_adjust->timing_adjust_pending = false;