net/mlx5e: Add param helper to calculate max page size

This function will be necessary to determine the upper limit of
rx-page-size.

Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260223204155.1783580-15-tariqt@nvidia.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
index 304b46ecc8dfcab772a5dc04291f0233ee32e2f2..26bb31c56e457711da70bcecc9fd587b0d08c96e 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
@@ -501,6 +501,18 @@ u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev,
        return 0;
 }
 
+u32 mlx5e_mpwrq_max_page_size(struct mlx5_core_dev *mdev)
+{
+       if (mlx5_core_is_ecpf(mdev))
+               return PAGE_SIZE;
+
+       /* Two MTTs are needed to form an octword. Driver is using a
+        * single page per MTT for simplicity. Hence the limit of having
+        * at least 2 pages per WQE.
+        */
+       return BIT(MLX5_MPWRQ_MAX_LOG_WQE_SZ - 1);
+}
+
 u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *params)
 {
        bool is_mpwqe = MLX5E_GET_PFLAG(params, MLX5E_PFLAG_SKB_TX_MPWQE);

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h
index 5b6d528bce9ba7a5133a3ee1fc6f24c477709fee..9b1a2aed17c3fc7e009cb3a86d415b5bfc53599a 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h
@@ -121,6 +121,7 @@ u8 mlx5e_mpwqe_get_min_wqe_bulk(unsigned int wq_sz);
 u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev,
                          struct mlx5e_params *params,
                          struct mlx5e_rq_opt_param *rqo);
+u32 mlx5e_mpwrq_max_page_size(struct mlx5_core_dev *mdev);
 
 /* Build queue parameters */