return false;
break;
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
+ return false;
+ break;
+
case 'p':
if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
return false;
edge new_edge;
int abnormal_edge_flags = 0;
bool asm_goto_edge = false;
- int loc;
/* In the case the last instruction is conditional jump to the next
instruction, first redirect the jump itself and then continue
else
jump_block = e->src;
- loc = e->goto_locus;
+ const location_t loc = e->goto_locus;
e->flags &= ~EDGE_FALLTHRU;
if (target == EXIT_BLOCK_PTR_FOR_FN (cfun))
{
break;
case 'i':
+ case 'L':
break;
default:
case '0': /* unused field */
case 'i': /* integer */
case 'n': /* note */
+ case 'L': /* location_t */
case 'w': /* wide integer */
case 's': /* pointer to string */
case 'S': /* optional pointer to string */
result = result * 613 + (unsigned) XINT (k, fidx);
break;
case 'w':
- if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT))
- result = result * 613 + (unsigned) XWINT (k, fidx);
- else
- {
- size_t i;
- for (i = 0; i < sizeof (HOST_WIDE_INT) / sizeof (unsigned); i++)
- result = result * 613 + (unsigned) (XWINT (k, fidx)
- >> CHAR_BIT * i);
- }
- break;
+ case 'L':
+ {
+ const HOST_WIDE_INT val
+ = (format[fidx] == 'L' ? XLOC (k, fidx) : XWINT (k, fidx));
+ if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT))
+ result = result * 613 + (unsigned) val;
+ else
+ {
+ size_t i;
+ for (i = 0; i < sizeof (HOST_WIDE_INT) / sizeof (unsigned); i++)
+ result = result * 613 + (unsigned) (val
+ >> CHAR_BIT * i);
+ }
+ break;
+ }
case '0':
break;
default:
hash += (unsigned int) XINT (x, i);
break;
+ case 'L':
+ hash += (unsigned int) XLOC (x, i);
+ break;
+
case 'p':
hash += constant_lower_bound (SUBREG_BYTE (x));
break;
return false;
break;
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
+ return false;
+ break;
+
case 'w':
if (XWINT (x, i) != XWINT (y, i))
return false;
return false;
break;
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
+ return false;
+ break;
+
case 'p':
if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
return false;
hash.add_hwi (XINT (x, i));
break;
+ case 'L':
+ hash.add_hwi (XLOC (x, i));
+ break;
+
case 'p':
hash.add_int (constant_lower_bound (SUBREG_BYTE (x)));
break;
case 't':
case 'w':
case 'i':
+ case 'L':
case 's':
case 'S':
case 'T':
rtx_insn *
gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
- basic_block bb, rtx pattern, int location, int code,
+ basic_block bb, rtx pattern, location_t location, int code,
rtx reg_notes)
{
- return as_a <rtx_insn *> (gen_rtx_fmt_uuBeiie (INSN, mode,
+ return as_a <rtx_insn *> (gen_rtx_fmt_uuBeLie (INSN, mode,
prev_insn, next_insn,
bb, pattern, location, code,
reg_notes));
case 't':
case 'w':
case 'i':
+ case 'L':
case 'p':
case 's':
case 'S':
case 's':
case '0':
case 'i':
+ case 'L':
case 'w':
case 'p':
case 'n':
XINT (rt_val, i) = va_arg (p, int);
break;
+ case 'L': /* A location_t? */
+ XLOC (rt_val, i) = va_arg (p, location_t);
+ break;
+
case 'w': /* A wide integer? */
XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
break;
fprintf (file, "%u", XINT (x, i));
break;
+ case 'L':
+ fprintf (file, "%llu", (unsigned long long) XLOC (x, i));
+ break;
+
case 'r':
fprintf (file, "%u", REGNO (x));
break;
case 'i':
return "int ";
+ case 'L':
+ return "location_t ";
+
case 'w':
return "HOST_WIDE_INT ";
case 'i':
return "XINT";
+ case 'L':
+ return "XLOC";
+
case 'w':
return "XWINT";
subname = "rt_int";
break;
+ case 'L':
+ t = scalar_tp;
+ subname = "rt_loc";
+ break;
+
case 'p':
t = scalar_tp;
subname = "rt_subreg";
printf (" if (XINT (x, %d) != %d) goto L%d;\n",
i, XINT (x, i), fail_label);
}
+ else if (fmt[i] == 'L')
+ gcc_unreachable ();
else if (fmt[i] == 'r')
{
gcc_assert (i == 0);
return r;
break;
- case 'r': case 'p': case 'i': case 'w': case '0': case 's':
+ case 'r': case 'p': case 'i': case 'w': case '0': case 's': case 'L':
break;
default:
return r;
break;
- case 'r': case 'p': case 'i': case 'w': case '0': case 's':
+ case 'r': case 'p': case 'i': case 'w': case '0': case 's': case 'L':
break;
default:
validate_pattern (XVECEXP (pattern, i, j), info, NULL_RTX, 0);
break;
- case 'r': case 'p': case 'i': case 'w': case '0': case 's':
+ case 'r': case 'p': case 'i': case 'w': case '0': case 's': case 'L':
break;
default:
switch (fmt[i])
{
- case 'r': case 'p': case 'i': case 'w': case 's':
+ case 'r': case 'p': case 'i': case 'w': case 's': case 'L':
continue;
case 'e': case 'u':
case 'r': case 'p': case 'i': case 'w':
case '0': case 's': case 'S': case 'T':
+ case 'L':
break;
default:
case 'r': case 'p': case 'i': case 'w':
case '0': case 's': case 'S': case 'T':
+ case 'L':
break;
default:
}
break;
- case 'r': case 'p': case 'i': case 'w': case '0': case 's':
+ case 'r': case 'p': case 'i': case 'w': case '0': case 's': case 'L':
break;
default:
}
break;
- case 'r': case 'p': case 'i': case 'w': case '0': case 's':
+ case 'r': case 'p': case 'i': case 'w': case '0': case 's': case 'L':
break;
default:
case 'r': case 'p': case 'i': case 'w':
case '0': case 's': case 'S': case 'T':
+ case 'L':
break;
default:
case 'i':
if (XINT (x, i) != XINT (y, i))
+ return false;
+ break;
+
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
{
if (((code == ASM_OPERANDS && i == 6)
|| (code == ASM_INPUT && i == 1)))
}
else if (fmt[i] == 'i' || fmt[i] == 'n')
val ^= XINT (x, i);
+ else if (fmt[i] == 'L')
+ val ^= XLOC (x, i);
else if (fmt[i] == 'p')
val ^= constant_lower_bound (SUBREG_BYTE (x));
}
return false;
break;
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
+ return false;
+ break;
+
case 'p':
if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
return false;
val += XINT (x, i);
break;
+ case 'L':
+ val += XLOC (x, i);
+ break;
+
case 'V':
case 'E':
val += XVECLEN (x, i);
m_indent -= 2;
}
-/* Subroutine of print_rtx_operand for handling code 'i'. */
+/* Subroutine of print_rtx_operand for handling code 'L'. */
void
-rtx_writer::print_rtx_operand_code_i (const_rtx in_rtx, int idx)
+rtx_writer::print_rtx_operand_code_L (const_rtx in_rtx, int idx)
{
if (idx == 4 && INSN_P (in_rtx))
{
LOCATION_LINE (ASM_INPUT_SOURCE_LOCATION (in_rtx)));
#endif
}
- else if (idx == 5 && NOTE_P (in_rtx))
+ else
+ gcc_unreachable ();
+}
+
+/* Subroutine of print_rtx_operand for handling code 'i'. */
+
+void
+rtx_writer::print_rtx_operand_code_i (const_rtx in_rtx, int idx)
+{
+ if (idx == 5 && NOTE_P (in_rtx))
{
/* This field is only used for NOTE_INSN_DELETED_LABEL, and
other times often contains garbage from INSN->NOTE death. */
print_rtx_operand_code_i (in_rtx, idx);
break;
+ case 'L':
+ print_rtx_operand_code_L (in_rtx, idx);
+ break;
+
case 'p':
fprintf (m_outfile, " ");
print_poly_int (m_outfile, SUBREG_BYTE (in_rtx));
void print_rtx_operand_code_e (const_rtx in_rtx, int idx);
void print_rtx_operand_codes_E_and_V (const_rtx in_rtx, int idx);
void print_rtx_operand_code_i (const_rtx in_rtx, int idx);
+ void print_rtx_operand_code_L (const_rtx in_rtx, int idx);
void print_rtx_operand_code_r (const_rtx in_rtx);
void print_rtx_operand_code_u (const_rtx in_rtx, int idx);
void print_rtx_operand (const_rtx in_rtx, int idx);
int parse_enum_value (int num_values, const char *const *strings);
void read_rtx_operand_u (rtx x, int idx);
- void read_rtx_operand_i_or_n (rtx x, int idx, char format_char);
+ void read_rtx_operand_inL (rtx x, int idx, char format_char);
rtx read_rtx_operand_r (rtx x);
rtx extra_parsing_for_operand_code_0 (rtx x, int idx);
case 'i':
case 'n':
- read_rtx_operand_i_or_n (x, idx, format_char);
+ case 'L':
+ read_rtx_operand_inL (x, idx, format_char);
/* Don't run regular parser for these codes. */
return x;
Special-cased handling of these, for reading function dumps. */
void
-function_reader::read_rtx_operand_i_or_n (rtx x, int idx,
- char format_char)
+function_reader::read_rtx_operand_inL (rtx x, int idx, char format_char)
{
/* Handle some of the extra information that print_rtx
can write out for these cases. */
if (format_char == 'n')
value = parse_note_insn_name (name.string);
else
- value = atoi (name.string);
+ {
+ gcc_checking_assert (format_char == 'i');
+ value = atoi (name.string);
+ }
XINT (x, idx) = value;
}
case 'n':
XINT (x, index) = value;
break;
+ case 'L':
+ XLOC (x, index) = value;
+ break;
case 'w':
XWINT (x, index) = value;
break;
case 'n':
case 'w':
case 'p':
+ case 'L':
{
/* Can be an iterator or an integer constant. */
file_location loc = read_name (&name);
return 0;
break;
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
+ return 0;
+ break;
+
case 'p':
if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
return 0;
"i" an integer
prints the integer
"n" like "i", but prints entries from `note_insn_name'
+ "L" like "i", but correctly sized to hold a location_t,
+ which may be configured as 32- or 64-bit.
"w" an integer of width HOST_BITS_PER_WIDE_INT
prints the integer
"s" a pointer to a string
case 't':
case 'w':
case 'i':
+ case 'L':
case 'p':
case 's':
case 'S':
case 'n':
case 'i':
if (XINT (x, i) != XINT (y, i))
- {
-#ifndef GENERATOR_FILE
- if (((code == ASM_OPERANDS && i == 6)
- || (code == ASM_INPUT && i == 1))
- && XINT (x, i) == XINT (y, i))
- break;
-#endif
- return false;
- }
+ return false;
+ break;
+
+ case 'L':
+ if (XLOC (x, i) != XLOC (y, i))
+ return false;
break;
case 'p':
---------------------------------------------------------------------- */
/* An annotation for variable assignment tracking. */
-DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
+DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeLie", RTX_INSN)
/* An instruction that cannot jump. */
-DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
+DEF_RTL_EXPR(INSN, "insn", "uuBeLie", RTX_INSN)
/* An instruction that can possibly jump.
Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
-DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
+DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeLie0", RTX_INSN)
/* An instruction that can possibly call a subroutine
but which will not change which instruction comes next
in the current function.
Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE.
All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
-DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
+DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeLiee", RTX_INSN)
/* Placeholder for tablejump JUMP_INSNs. The pattern of this kind
of rtx is always either an ADDR_VEC or an ADDR_DIFF_VEC. These
These occur in an insn all by themselves as the PATTERN.
They also appear inside an ASM_OPERANDS
as a convenient way to hold a string. */
-DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA)
+DEF_RTL_EXPR(ASM_INPUT, "asm_input", "sL", RTX_EXTRA)
/* An assembler instruction with operands.
1st operand is the instruction template.
and whose mode indicates the mode of the input operand.
6th is a vector of labels that may be branched to by the asm.
7th is the source line number. */
-DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEEi", RTX_EXTRA)
+DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEEL", RTX_EXTRA)
/* A machine-specific operation.
1st operand is a vector of operands being used by the operation so that
{
int rt_int;
unsigned int rt_uint;
+ location_t rt_loc;
poly_uint16 rt_subreg;
const char *rt_str;
rtx rt_rtx;
i.e. an annotation for tracking variable assignments.
This is an instance of:
- DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
+ DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeLie", RTX_INSN)
from rtl.def. */
};
i.e an instruction that cannot jump.
This is an instance of:
- DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
+ DEF_RTL_EXPR(INSN, "insn", "uuBeLie", RTX_INSN)
from rtl.def. */
};
i.e. an instruction that can possibly jump.
This is an instance of:
- DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
+ DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeLie0", RTX_INSN)
from rtl.def. */
/* Returns jump target of this instruction. The returned value is not
in the current function.
This is an instance of:
- DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
+ DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeLiee", RTX_INSN)
from rtl.def. */
};
#define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int)
#define XUINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_uint)
+#define XLOC(RTX, N) (RTL_CHECK1 (RTX, N, 'L').rt_loc)
#define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str)
#define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx)
#define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec)
#define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int)
#define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint)
+#define X0LOC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_loc)
#define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str)
#define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx)
#define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec)
#define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int)
#define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint)
+#define XCLOC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_loc)
#define XCSUBREG(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_subreg)
#define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str)
#define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx)
return XEXP (insn, 3);
}
-inline unsigned int INSN_LOCATION (const rtx_insn *insn)
+inline location_t INSN_LOCATION (const rtx_insn *insn)
{
- return XUINT (insn, 4);
+ return XLOC (insn, 4);
}
-inline unsigned int& INSN_LOCATION (rtx_insn *insn)
+inline location_t& INSN_LOCATION (rtx_insn *insn)
{
- return XUINT (insn, 4);
+ return XLOC (insn, 4);
}
inline bool INSN_HAS_LOCATION (const rtx_insn *insn)
#define NOTE_EH_HANDLER(INSN) XCINT (INSN, 3, NOTE)
#define NOTE_BASIC_BLOCK(INSN) XCBBDEF (INSN, 3, NOTE)
#define NOTE_VAR_LOCATION(INSN) XCEXP (INSN, 3, NOTE)
-#define NOTE_MARKER_LOCATION(INSN) XCUINT (INSN, 3, NOTE)
+#define NOTE_MARKER_LOCATION(INSN) XCLOC (INSN, 3, NOTE)
#define NOTE_CFI(INSN) XCCFI (INSN, 3, NOTE)
#define NOTE_LABEL_NUMBER(INSN) XCINT (INSN, 3, NOTE)
#define ASM_OPERANDS_LABEL_VEC(RTX) XCVEC (RTX, 5, ASM_OPERANDS)
#define ASM_OPERANDS_LABEL_LENGTH(RTX) XCVECLEN (RTX, 5, ASM_OPERANDS)
#define ASM_OPERANDS_LABEL(RTX, N) XCVECEXP (RTX, 5, N, ASM_OPERANDS)
-#define ASM_OPERANDS_SOURCE_LOCATION(RTX) XCUINT (RTX, 6, ASM_OPERANDS)
-#define ASM_INPUT_SOURCE_LOCATION(RTX) XCUINT (RTX, 1, ASM_INPUT)
+#define ASM_OPERANDS_SOURCE_LOCATION(RTX) XCLOC (RTX, 6, ASM_OPERANDS)
+#define ASM_INPUT_SOURCE_LOCATION(RTX) XCLOC (RTX, 1, ASM_INPUT)
/* 1 if RTX is a mem that is statically allocated in read-only memory. */
#define MEM_READONLY_P(RTX) \
#include "genrtl.h"
#undef gen_rtx_ASM_INPUT
#define gen_rtx_ASM_INPUT(MODE, ARG0) \
- gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), 0)
+ gen_rtx_fmt_sL (ASM_INPUT, (MODE), (ARG0), 0)
#define gen_rtx_ASM_INPUT_loc(MODE, ARG0, LOC) \
- gen_rtx_fmt_si (ASM_INPUT, (MODE), (ARG0), (LOC))
+ gen_rtx_fmt_sL (ASM_INPUT, (MODE), (ARG0), (LOC))
#endif
/* There are some RTL codes that require special attention; the
extern rtx_insn_list *gen_rtx_INSN_LIST (machine_mode, rtx, rtx);
extern rtx_insn *
gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
- basic_block bb, rtx pattern, int location, int code,
+ basic_block bb, rtx pattern, location_t location, int code,
rtx reg_notes);
extern rtx gen_rtx_CONST_INT (machine_mode, HOST_WIDE_INT);
extern rtx gen_rtx_CONST_VECTOR (machine_mode, rtvec);
case 'i':
hstate.add_int (XINT (x, i));
break;
+ case 'L':
+ hstate.add_hwi (XLOC (x, i));
+ break;
case 'p':
hstate.add_poly_int (SUBREG_BYTE (x));
break;
else
return 1;
+ case 'L':
+ if (XLOC (x, i) == XLOC (y, i))
+ break;
+ else if (XLOC (x, i) < XLOC (y, i))
+ return -1;
+ else
+ return 1;
+
case 'p':
r = compare_sizes_for_sort (SUBREG_BYTE (x), SUBREG_BYTE (y));
if (r != 0)
projects / thirdparty / gcc.git / commitdiff
