arm64: dts: imx8qm-tqma8qm-mba8x: Disable Cortex-A72 cluster

Due to missing workaround for "ERR050104: Arm/A53: Cache coherency issue"
disable the whole Cortex-A72 cluster.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts
index bf972010a88e7e80ffba7eb367f2291f8e8324a7..ab3b244b684fd349c27bcba01f4291122b88eab7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts
@@ -298,45 +298,6 @@
                                };
                        };
                };
-
-               cpu1-thermal {
-                       trips {
-                               soc_active1_0: trip-active0 {
-                                       temperature = <40000>;
-                                       hysteresis = <5000>;
-                                       type = "active";
-                               };
-
-                               soc_active1_1: trip-active1 {
-                                       temperature = <48000>;
-                                       hysteresis = <3000>;
-                                       type = "active";
-                               };
-
-                               soc_active1_2: trip-active2 {
-                                       temperature = <60000>;
-                                       hysteresis = <10000>;
-                                       type = "active";
-                               };
-                       };
-
-                       cooling-maps {
-                               map1 {
-                                       trip = <&soc_active1_0>;
-                                       cooling-device = <&fan0 1 1>;
-                               };
-
-                               map2 {
-                                       trip = <&soc_active1_1>;
-                                       cooling-device = <&fan0 2 2>;
-                               };
-
-                               map3 {
-                                       trip = <&soc_active1_2>;
-                                       cooling-device = <&fan0 3 3>;
-                               };
-                       };
-               };
        };
 };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi
index d94605c999915004b671884c8224733bf3f3cbd8..f0e398eb2aad7a36372ee24f81ae0b29d1e52837 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi
@@ -15,6 +15,13 @@
        model = "TQ-Systems i.MX8QM TQMa8QM";
        compatible = "tq,imx8qm-tqma8qm", "fsl,imx8qm";
 
+       /* Due to missing workaround for ERR050104 */
+       cpus {
+               /delete-node/ cpu-map;
+               /delete-node/ cpu@100;
+               /delete-node/ cpu@101;
+       };
+
        memory@80000000 {
                device_type = "memory";
                /*
@@ -174,6 +181,8 @@
 };
 
 &thermal_zones {
+       /delete-node/ cpu1-thermal;
+
        pmic0-thermal {
                polling-delay-passive = <250>;
                polling-delay = <2000>;
@@ -199,9 +208,7 @@
                                        <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                        <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                        <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                       <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                       <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                       <&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                        };
                };
        };