#define SCP_AXICK_DCM_DIS_EN BIT(0)
#define SCP_AXICK_26M_SEL_EN BIT(4)
+static struct udevice *mtk_clk_providers[MTK_CLK_TREE_NUM_TYPES];
+
+static bool mtk_clk_tree_type_is_provider(enum mtk_clk_tree_type type)
+{
+ return type != MTK_CLK_TREE_NONE && type < MTK_CLK_TREE_NUM_TYPES;
+}
+
+static int mtk_clk_tree_register_provider(struct udevice *dev,
+ const struct mtk_clk_tree *tree)
+{
+ if (!mtk_clk_tree_type_is_provider(tree->type))
+ return 0;
+
+ if (mtk_clk_providers[tree->type])
+ return -EEXIST;
+
+ mtk_clk_providers[tree->type] = dev;
+
+ return 0;
+}
+
/* shared functions */
static const int mtk_common_clk_of_xlate(struct clk *clk,
#endif
};
+int mtk_common_clk_parent_bind(struct udevice *dev)
+{
+ /*
+ * Clock trees that provide parent clocks need to be probed right away
+ * so that any clock depending on them will work correctly.
+ */
+ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
+ return 0;
+}
+
static int mtk_common_clk_init_drv(struct udevice *dev,
const struct mtk_clk_tree *tree,
const struct driver *drv)
priv->parent = parent;
priv->tree = tree;
- return 0;
+ return mtk_clk_tree_register_provider(dev, tree);
}
int mtk_common_clk_init(struct udevice *dev,
#define ETHSYS_HIFSYS_RST_CTRL_OFS 0x34
+/* These get matched to CLK_PARENT_* when looking up parent clocks. */
+enum mtk_clk_tree_type {
+ MTK_CLK_TREE_NONE,
+ MTK_CLK_TREE_APMIXED,
+ MTK_CLK_TREE_TOPCKGEN,
+ MTK_CLK_TREE_INFRASYS,
+ MTK_CLK_TREE_NUM_TYPES
+};
+
/* struct mtk_pll_data - hardware-specific PLLs data */
struct mtk_pll_data {
/* unmapped ID of clock */
const int num_muxes;
const int num_gates;
u32 flags;
+ /*
+ * Set this if this tree provides a specific type for parent lookup.
+ * Devices that set this should also include mtk_common_clk_parent_bind()
+ * in the driver bind function to ensure that it will be registered as
+ * a provider.
+ */
+ enum mtk_clk_tree_type type;
};
struct mtk_clk_priv {
extern const struct clk_ops mtk_clk_infrasys_ops;
extern const struct clk_ops mtk_clk_gate_ops;
+int mtk_common_clk_parent_bind(struct udevice *dev);
int mtk_common_clk_init(struct udevice *dev,
const struct mtk_clk_tree *tree);
int mtk_common_clk_infrasys_init(struct udevice *dev,