Move pcie port method to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
spinlock_t pcie_idx_lock;
amdgpu_rreg_t pcie_rreg;
amdgpu_wreg_t pcie_wreg;
- amdgpu_rreg_t pciep_rreg;
- amdgpu_wreg_t pciep_wreg;
amdgpu_rreg_ext_t pcie_rreg_ext;
amdgpu_wreg_ext_t pcie_wreg_ext;
amdgpu_rreg64_t pcie_rreg64;
#define WREG32_XCC(reg, v, inst) amdgpu_device_xcc_wreg(adev, (reg), (v), 0, inst)
#define RREG32_PCIE(reg) adev->pcie_rreg(adev, (reg))
#define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v))
-#define RREG32_PCIE_PORT(reg) adev->pciep_rreg(adev, (reg))
-#define WREG32_PCIE_PORT(reg, v) adev->pciep_wreg(adev, (reg), (v))
+#define RREG32_PCIE_PORT(reg) amdgpu_reg_pciep_rd32(adev, (reg))
+#define WREG32_PCIE_PORT(reg, v) amdgpu_reg_pciep_wr32(adev, (reg), (v))
#define RREG32_PCIE_EXT(reg) adev->pcie_rreg_ext(adev, (reg))
#define WREG32_PCIE_EXT(reg, v) adev->pcie_wreg_ext(adev, (reg), (v))
#define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg))
adev->pcie_wreg = &amdgpu_invalid_wreg;
adev->pcie_rreg_ext = &amdgpu_invalid_rreg_ext;
adev->pcie_wreg_ext = &amdgpu_invalid_wreg_ext;
- adev->pciep_rreg = &amdgpu_invalid_rreg;
- adev->pciep_wreg = &amdgpu_invalid_wreg;
adev->pcie_rreg64 = &amdgpu_invalid_rreg64;
adev->pcie_wreg64 = &amdgpu_invalid_wreg64;
adev->pcie_rreg64_ext = &amdgpu_invalid_rreg64_ext;
spin_lock_init(&adev->reg.audio_endpt.lock);
adev->reg.audio_endpt.rreg = NULL;
adev->reg.audio_endpt.wreg = NULL;
+
+ adev->reg.pcie.port_rreg = NULL;
+ adev->reg.pcie.port_wreg = NULL;
}
uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg)
adev->reg.audio_endpt.wreg(adev, block, reg, v);
}
+uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg)
+{
+ if (!adev->reg.pcie.port_rreg) {
+ dev_err_once(adev->dev, "PCIEP register read not supported\n");
+ return 0;
+ }
+ return adev->reg.pcie.port_rreg(adev, reg);
+}
+
+void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
+{
+ if (!adev->reg.pcie.port_wreg) {
+ dev_err_once(adev->dev, "PCIEP register write not supported\n");
+ return;
+ }
+ adev->reg.pcie.port_wreg(adev, reg, v);
+}
+
/*
* register access helper functions.
*/
amdgpu_block_wreg_t wreg;
};
+struct amdgpu_reg_pcie_ind {
+ amdgpu_rreg_t port_rreg;
+ amdgpu_wreg_t port_wreg;
+};
+
struct amdgpu_reg_access {
struct amdgpu_reg_ind smc;
struct amdgpu_reg_ind uvd_ctx;
struct amdgpu_reg_ind gc_cac;
struct amdgpu_reg_ind se_cac;
struct amdgpu_reg_ind_blk audio_endpt;
+ struct amdgpu_reg_pcie_ind pcie;
};
void amdgpu_reg_access_init(struct amdgpu_device *adev);
uint32_t reg);
void amdgpu_reg_audio_endpt_wr32(struct amdgpu_device *adev, uint32_t block,
uint32_t reg, uint32_t v);
+uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
+void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
+ uint32_t v);
typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
adev->pcie_wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
- adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
- adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
+ adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
+ adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
adev->reg.didt.rreg = &nv_didt_rreg;
adev->reg.didt.wreg = &nv_didt_wreg;
adev->reg.smc.wreg = si_smc_wreg;
adev->pcie_rreg = &si_pcie_rreg;
adev->pcie_wreg = &si_pcie_wreg;
- adev->pciep_rreg = &si_pciep_rreg;
- adev->pciep_wreg = &si_pciep_wreg;
+ adev->reg.pcie.port_rreg = &si_pciep_rreg;
+ adev->reg.pcie.port_wreg = &si_pciep_wreg;
adev->reg.uvd_ctx.rreg = &si_uvd_ctx_rreg;
adev->reg.uvd_ctx.wreg = &si_uvd_ctx_wreg;
adev->pcie_wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
- adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
- adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
+ adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
+ adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
adev->reg.didt.rreg = &soc21_didt_rreg;
adev->reg.didt.wreg = &soc21_didt_wreg;
adev->pcie_wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
- adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
- adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
+ adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
+ adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
adev->asic_funcs = &soc24_asic_funcs;
adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
- adev->pciep_rreg = amdgpu_device_pcie_port_rreg;
- adev->pciep_wreg = amdgpu_device_pcie_port_wreg;
+ adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
+ adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
adev->pcie_wreg64_ext = &amdgpu_device_indirect_wreg64_ext;