Handle x86 CET prefixes (64 bit only). Fixes #379525.

Patch from tatyana.a.mineeva@intel.com.

git-svn-id: svn://svn.valgrind.org/vex/trunk@3383

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index ef6f1ea7fcf8641c0584c67e01cebf7b7cbe2f73..9073e1d36e35e4a1b5f21cb86efecdbf171903cc 100644 (file)
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -21830,13 +21830,22 @@ Long dis_ESC_0F (
       }
       return delta;
 
+   case 0x19:
+   case 0x1C:
+   case 0x1D:
+   case 0x1E:
    case 0x1F:
-      if (haveF2orF3(pfx)) goto decode_failure;
+      // Intel CET instructions can have any prefixes before NOPs
+      // and can use any ModRM, SIB and disp
       modrm = getUChar(delta);
-      if (epartIsReg(modrm)) goto decode_failure;
-      addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
-      delta += alen;
-      DIP("nop%c %s\n", nameISize(sz), dis_buf);
+      if (epartIsReg(modrm)) {
+         delta += 1;
+         DIP("nop%c\n", nameISize(sz));
+      } else {
+         addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+         delta += alen;
+         DIP("nop%c %s\n", nameISize(sz), dis_buf);
+      }
       return delta;
 
    case 0x31: { /* RDTSC */