spi: imx: keep dma request disabled before dma transfer setup

[ Upstream commit 86d57d9c07d54e8cb385ffe800930816ccdba0c1 ]

Since sdma hardware configure postpone to transfer phase, have to disable
dma request before dma transfer setup because there is a hardware
limitation on sdma event enable(ENBLn) as below:

"It is thus essential for the Arm platform to program them before any DMA
 request is triggered to the SDMA, otherwise an unpredictable combination
 of channels may be started."

Signed-off-by: Carlos Song <carlos.song@nxp.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Link: https://patch.msgid.link/20251024055320.408482-1-carlos.song@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 810541eed213e2ff59b23eae1f143539751d23bc..94d0f7695d07a3bc1bf7d6b5e3189326ec2e3475 100644 (file)
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -503,9 +503,15 @@ static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
 {
        u32 reg;
 
-       reg = readl(spi_imx->base + MX51_ECSPI_CTRL);
-       reg |= MX51_ECSPI_CTRL_XCH;
-       writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
+       if (spi_imx->usedma) {
+               reg = readl(spi_imx->base + MX51_ECSPI_DMA);
+               reg |= MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN;
+               writel(reg, spi_imx->base + MX51_ECSPI_DMA);
+       } else {
+               reg = readl(spi_imx->base + MX51_ECSPI_CTRL);
+               reg |= MX51_ECSPI_CTRL_XCH;
+               writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
+       }
 }
 
 static void mx51_ecspi_disable(struct spi_imx_data *spi_imx)
@@ -699,7 +705,6 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx)
        writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
                MX51_ECSPI_DMA_TX_WML(tx_wml) |
                MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
-               MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
                MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
 }
 
@@ -1458,6 +1463,8 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
        reinit_completion(&spi_imx->dma_tx_completion);
        dma_async_issue_pending(controller->dma_tx);
 
+       spi_imx->devtype_data->trigger(spi_imx);
+
        transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len);
 
        /* Wait SDMA to finish the data transfer.*/