]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Fri, 27 Jun 2025 20:42:32 +0000 (21:42 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 2 Jul 2025 18:19:48 +0000 (20:19 +0200)
Add XSPI core clock definitions to the clock bindings for the Renesas
R9A09G056 and R9A09G057 SoCs. These clocks IDs are used to support XSPI
interface.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250627204237.214635-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/renesas,r9a09g056-cpg.h
include/dt-bindings/clock/renesas,r9a09g057-cpg.h

index f4905b27f8d9aa506807a2520819c4823aae1599..a9af5af9e3a1119c7b0dc48251803dafc976a217 100644 (file)
@@ -20,5 +20,6 @@
 #define R9A09G056_USB2_0_CLK_CORE0             9
 #define R9A09G056_GBETH_0_CLK_PTP_REF_I                10
 #define R9A09G056_GBETH_1_CLK_PTP_REF_I                11
+#define R9A09G056_SPI_CLK_SPI                  12
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G056_CPG_H__ */
index 884dbeb1e139ff2f6ab0fb5a03fde12f7d1ac514..5346a898ab60a29e9c49b6f8e52bd2d1b48c2c9f 100644 (file)
@@ -21,5 +21,6 @@
 #define R9A09G057_USB2_0_CLK_CORE1             10
 #define R9A09G057_GBETH_0_CLK_PTP_REF_I                11
 #define R9A09G057_GBETH_1_CLK_PTP_REF_I                12
+#define R9A09G057_SPI_CLK_SPI                  13
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */