mmc: sdhci-brcmstb: move SDIO_CFG_CQ_CAPABILITY define

Moving SDIO_CFG_CQ_CAPABILITY register defines to be in sorted order for
better readability.

Signed-off-by: Kamal Dasu <kamal.dasu@broadcom.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index 15705e85417f403646d00c602e59242cc927ffcd..0320a27f69a7d8fb974a15979fea978d85b4a0cc 100644 (file)
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -31,13 +31,11 @@
 
 #define SDHCI_ARASAN_CQE_BASE_ADDR             0x200
 
-#define SDIO_CFG_CQ_CAPABILITY                 0x4c
-#define SDIO_CFG_CQ_CAPABILITY_FMUL            GENMASK(13, 12)
-
 #define SDIO_CFG_CTRL                          0x0
 #define SDIO_CFG_CTRL_SDCD_N_TEST_EN           BIT(31)
 #define SDIO_CFG_CTRL_SDCD_N_TEST_LEV          BIT(30)
-
+#define SDIO_CFG_CQ_CAPABILITY                 0x4c
+#define SDIO_CFG_CQ_CAPABILITY_FMUL            GENMASK(13, 12)
 #define SDIO_CFG_MAX_50MHZ_MODE                        0x1ac
 #define SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE BIT(31)
 #define SDIO_CFG_MAX_50MHZ_MODE_ENABLE         BIT(0)