x86: Set Prefer_No_VZEROUPPER if AVX512ER is available

AVX512ER won't be implemented in any Xeon processors and will be in
all Xeon Phi processors.  Don't check CPU model number when setting
Prefer_No_VZEROUPPER for Xeon Phi.  Instead, set Prefer_No_VZEROUPPER
if AVX512ER is available.  It works with current and future Xeon Phi
and non-Xeon Phi processors.

	* sysdeps/x86/cpu-features.c (init_cpu_features): Set
	Prefer_No_VZEROUPPER if AVX512ER is available.
	* sysdeps/x86/cpu-features.h
	(bit_cpu_AVX512PF): New.
	(bit_cpu_AVX512ER): Likewise.
	(bit_cpu_AVX512CD): Likewise.
	(bit_cpu_AVX512BW): Likewise.
	(bit_cpu_AVX512VL): Likewise.
	(index_cpu_AVX512PF): Likewise.
	(index_cpu_AVX512ER): Likewise.
	(index_cpu_AVX512CD): Likewise.
	(index_cpu_AVX512BW): Likewise.
	(index_cpu_AVX512VL): Likewise.
	(reg_AVX512PF): Likewise.
	(reg_AVX512ER): Likewise.
	(reg_AVX512CD): Likewise.
	(reg_AVX512BW): Likewise.
	(reg_AVX512VL): Likewise.

(cherry picked from commit 1c53cb49de6d82d9469ccbd5aa0c55924502bd8b)

diff --git a/ChangeLog b/ChangeLog
index 13f809d26fce19bc6be66a54e1db9ebd6beee397..eecd2133c7524e939b9f89586148da4423e9935c 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,24 @@
+2017-04-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * sysdeps/x86/cpu-features.c (init_cpu_features): Set
+       Prefer_No_VZEROUPPER if AVX512ER is available.
+       * sysdeps/x86/cpu-features.h
+       (bit_cpu_AVX512PF): New.
+       (bit_cpu_AVX512ER): Likewise.
+       (bit_cpu_AVX512CD): Likewise.
+       (bit_cpu_AVX512BW): Likewise.
+       (bit_cpu_AVX512VL): Likewise.
+       (index_cpu_AVX512PF): Likewise.
+       (index_cpu_AVX512ER): Likewise.
+       (index_cpu_AVX512CD): Likewise.
+       (index_cpu_AVX512BW): Likewise.
+       (index_cpu_AVX512VL): Likewise.
+       (reg_AVX512PF): Likewise.
+       (reg_AVX512ER): Likewise.
+       (reg_AVX512CD): Likewise.
+       (reg_AVX512BW): Likewise.
+       (reg_AVX512VL): Likewise.
+
 2017-01-05  Joseph Myers  <joseph@codesourcery.com>
 
        [BZ #21026]

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 11b9af2231958f0d6b599f0582624ec2fbc1f382..8f8cfce5b68ba7c4f2871ab50e13b15f21c00854 100644 (file)
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -133,8 +133,6 @@ init_cpu_features (struct cpu_features *cpu_features)
 
            case 0x57:
              /* Knights Landing.  Enable Silvermont optimizations.  */
-             cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
-               |= bit_arch_Prefer_No_VZEROUPPER;
 
            case 0x5c:
            case 0x5f:
@@ -206,6 +204,12 @@ init_cpu_features (struct cpu_features *cpu_features)
        cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
          |= bit_arch_AVX_Fast_Unaligned_Load;
 
+      /* Since AVX512ER is unique to Xeon Phi, set Prefer_No_VZEROUPPER
+         if AVX512ER is available.  */
+      if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER))
+       cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
+         |= bit_arch_Prefer_No_VZEROUPPER;
+
       /* To avoid SSE transition penalty, use _dl_runtime_resolve_slow.
          If XGETBV suports ECX == 1, use _dl_runtime_resolve_opt.  */
       cpu_features->feature[index_arch_Use_dl_runtime_resolve_slow]

diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index a8b5a734bd4ba4d3bd9d027292343407d6e514d1..265bc6c14d04af38850f7a4ade24af86a2785118 100644 (file)
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -62,6 +62,11 @@
 #define bit_cpu_AVX2           (1 << 5)
 #define bit_cpu_AVX512F                (1 << 16)
 #define bit_cpu_AVX512DQ       (1 << 17)
+#define bit_cpu_AVX512PF       (1 << 26)
+#define bit_cpu_AVX512ER       (1 << 27)
+#define bit_cpu_AVX512CD       (1 << 28)
+#define bit_cpu_AVX512BW       (1 << 30)
+#define bit_cpu_AVX512VL       (1u << 31)
 
 /* XCR0 Feature flags.  */
 #define bit_XMM_state          (1 << 1)
@@ -236,6 +241,11 @@ extern const struct cpu_features *__get_cpu_features (void)
 # define index_cpu_AVX2                COMMON_CPUID_INDEX_7
 # define index_cpu_AVX512F     COMMON_CPUID_INDEX_7
 # define index_cpu_AVX512DQ    COMMON_CPUID_INDEX_7
+# define index_cpu_AVX512PF    COMMON_CPUID_INDEX_7
+# define index_cpu_AVX512ER    COMMON_CPUID_INDEX_7
+# define index_cpu_AVX512CD    COMMON_CPUID_INDEX_7
+# define index_cpu_AVX512BW    COMMON_CPUID_INDEX_7
+# define index_cpu_AVX512VL    COMMON_CPUID_INDEX_7
 # define index_cpu_ERMS                COMMON_CPUID_INDEX_7
 # define index_cpu_RTM         COMMON_CPUID_INDEX_7
 # define index_cpu_FMA         COMMON_CPUID_INDEX_1
@@ -254,6 +264,11 @@ extern const struct cpu_features *__get_cpu_features (void)
 # define reg_AVX2              ebx
 # define reg_AVX512F           ebx
 # define reg_AVX512DQ          ebx
+# define reg_AVX512PF          ebx
+# define reg_AVX512ER          ebx
+# define reg_AVX512CD          ebx
+# define reg_AVX512BW          ebx
+# define reg_AVX512VL          ebx
 # define reg_ERMS              ebx
 # define reg_RTM               ebx
 # define reg_FMA               ecx