]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd: Drop amdgpu prefix from message prints
authorMario Limonciello (AMD) <superm1@kernel.org>
Mon, 15 Dec 2025 01:12:26 +0000 (19:12 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 5 Jan 2026 21:59:55 +0000 (16:59 -0500)
Hardcoding the prefix isn't necessary when using drm_* or dev_*
message prints.

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
31 files changed:
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index a050167e76a4bad93d2b3a803cefa07f4fc81e3c..1cbba9803d314d95027142f8b9423b8d510176a5 100644 (file)
@@ -66,7 +66,7 @@ static void amdgpu_benchmark_log_results(struct amdgpu_device *adev,
 
        throughput = div64_s64(throughput, time_ms);
 
-       dev_info(adev->dev, "amdgpu: %s %u bo moves of %u kB from"
+       dev_info(adev->dev, " %s %u bo moves of %u kB from"
                 " %d to %d in %lld ms, throughput: %lld Mb/s or %lld MB/s\n",
                 kind, n, size >> 10, sdomain, ddomain, time_ms,
                 throughput * 8, throughput);
index 52aa86d1bfa7c1e72877668bfcf2697b5276150e..01c2b803e56231af1a03da95df86eb8780df84f4 100644 (file)
@@ -4714,7 +4714,7 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
  */
 void amdgpu_device_fini_hw(struct amdgpu_device *adev)
 {
-       dev_info(adev->dev, "amdgpu: finishing device.\n");
+       dev_info(adev->dev, "finishing device.\n");
        flush_delayed_work(&adev->delayed_init_work);
 
        if (adev->mman.initialized)
index caa2e913c4d2f9293d24a8dee019a5434cd5822d..a26c0057b9d5020ceddb7e24b62c1d26547ab2bf 100644 (file)
@@ -130,11 +130,11 @@ void amdgpu_gfx_parse_disable_cu(struct amdgpu_device *adev, unsigned int *mask,
                }
 
                if (se < max_se && sh < max_sh && cu < 16) {
-                       DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu);
+                       drm_info(adev_to_drm(adev), "Disabling CU %u.%u.%u\n", se, sh, cu);
                        mask[se * max_sh + sh] |= 1u << cu;
                } else {
-                       DRM_ERROR("amdgpu: disable_cu %u.%u.%u is out of range\n",
-                                 se, sh, cu);
+                       drm_err(adev_to_drm(adev), "disable_cu %u.%u.%u is out of range\n",
+                               se, sh, cu);
                }
 
                next = strchr(p, ',');
@@ -152,7 +152,7 @@ static bool amdgpu_gfx_is_graphics_multipipe_capable(struct amdgpu_device *adev)
 static bool amdgpu_gfx_is_compute_multipipe_capable(struct amdgpu_device *adev)
 {
        if (amdgpu_compute_multipipe != -1) {
-               dev_info(adev->dev, "amdgpu: forcing compute pipe policy %d\n",
+               dev_info(adev->dev, " forcing compute pipe policy %d\n",
                         amdgpu_compute_multipipe);
                return amdgpu_compute_multipipe == 1;
        }
index 0a1bf61a113204252bfca6e7da7118f31732bc1a..82bc6d657e5a0a21f8f960156c1cf4e0eb2baf1c 100644 (file)
@@ -351,7 +351,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
        adev->irq.irq = irq;
        adev_to_drm(adev)->max_vblank_count = 0x00ffffff;
 
-       dev_dbg(adev->dev, "amdgpu: irq initialized.\n");
+       dev_dbg(adev->dev, "irq initialized.\n");
        return 0;
 
 free_vectors:
index 1aee207b135244102c619640eac50dda54c31f56..600e6bb98af7a414f753094443d7ca0517518909 100644 (file)
@@ -191,7 +191,7 @@ void amdgpu_ring_commit(struct amdgpu_ring *ring)
        uint32_t count;
 
        if (ring->count_dw < 0)
-               DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
+               drm_err(adev_to_drm(ring->adev), "writing more dwords to the ring than expected!\n");
 
        /* We pad to match fetch size */
        count = ring->funcs->align_mask + 1 -
index aff0da62cc7f9b007753179642387c93a9ffafd9..81ec3711643ee1560cad1dd80e35c29ec0ae1ac5 100644 (file)
@@ -2111,7 +2111,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
                DRM_DEBUG_DRIVER("Skipped stolen memory reservation\n");
        }
 
-       dev_info(adev->dev, "amdgpu: %uM of VRAM memory ready\n",
+       dev_info(adev->dev, " %uM of VRAM memory ready\n",
                 (unsigned int)(adev->gmc.real_vram_size / (1024 * 1024)));
 
        /* Compute GTT size, either based on TTM limit
@@ -2137,7 +2137,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
                dev_err(adev->dev, "Failed initializing GTT heap.\n");
                return r;
        }
-       dev_info(adev->dev, "amdgpu: %uM of GTT memory ready.\n",
+       dev_info(adev->dev, " %uM of GTT memory ready.\n",
                 (unsigned int)(gtt_size / (1024 * 1024)));
 
        if (adev->flags & AMD_IS_APU) {
@@ -2260,7 +2260,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
        ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
        ttm_device_fini(&adev->mman.bdev);
        adev->mman.initialized = false;
-       dev_info(adev->dev, "amdgpu: ttm finalized\n");
+       dev_info(adev->dev, " ttm finalized\n");
 }
 
 /**
index aa78c2ee9e21c2957f14f04bafdd3acfa6dc1f2c..fd881388d61256745852cf2cab01ae2775bb44bd 100644 (file)
@@ -790,7 +790,7 @@ static int vpe_ring_test_ring(struct amdgpu_ring *ring)
 
        ret = amdgpu_ring_alloc(ring, 4);
        if (ret) {
-               dev_err(adev->dev, "amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, ret);
+               dev_err(adev->dev, "dma failed to lock ring %d (%d).\n", ring->idx, ret);
                goto out;
        }
 
index 1081354a189294fefcc888c8b99e7a254ae2857d..7501b4a7efb55ec4daf6d3060d6839b77ab06b2d 100644 (file)
@@ -4041,8 +4041,8 @@ static int gfx_v10_0_ring_test_ring(struct amdgpu_ring *ring)
        WREG32(scratch, 0xCAFEDEAD);
        r = amdgpu_ring_alloc(ring, 3);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
-                         ring->idx, r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring %d (%d).\n",
+                       ring->idx, r);
                return r;
        }
 
@@ -4090,7 +4090,7 @@ static int gfx_v10_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err1;
        }
 
@@ -6379,7 +6379,7 @@ static int gfx_v10_0_cp_gfx_start(struct amdgpu_device *adev)
        ring = &adev->gfx.gfx_ring[0];
        r = amdgpu_ring_alloc(ring, gfx_v10_0_get_csb_size(adev) + 4);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                return r;
        }
 
@@ -6429,7 +6429,7 @@ static int gfx_v10_0_cp_gfx_start(struct amdgpu_device *adev)
                ring = &adev->gfx.gfx_ring[1];
                r = amdgpu_ring_alloc(ring, 2);
                if (r) {
-                       DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+                       drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                        return r;
                }
 
index d0ca2397afaa2b03884e6430e7574099342149a6..8c2ba5e268da214788d967d4f17cd001b7a92c45 100644 (file)
@@ -571,8 +571,8 @@ static int gfx_v11_0_ring_test_ring(struct amdgpu_ring *ring)
        WREG32(scratch, 0xCAFEDEAD);
        r = amdgpu_ring_alloc(ring, 5);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
-                         ring->idx, r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring %d (%d).\n",
+                       ring->idx, r);
                return r;
        }
 
@@ -628,7 +628,7 @@ static int gfx_v11_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err1;
        }
 
@@ -3630,7 +3630,7 @@ static int gfx_v11_0_cp_gfx_start(struct amdgpu_device *adev)
        ring = &adev->gfx.gfx_ring[0];
        r = amdgpu_ring_alloc(ring, gfx_v11_0_get_csb_size(adev));
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+               drm_err(&adev->ddev, "cp failed to lock ring (%d).\n", r);
                return r;
        }
 
@@ -3675,7 +3675,7 @@ static int gfx_v11_0_cp_gfx_start(struct amdgpu_device *adev)
                ring = &adev->gfx.gfx_ring[1];
                r = amdgpu_ring_alloc(ring, 2);
                if (r) {
-                       DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+                       drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                        return r;
                }
 
index c2e1db200712a47018d920056e6a90c54f6130b8..b1441d38f376f343b32bdc8159dc60d1e0ea2763 100644 (file)
@@ -460,8 +460,8 @@ static int gfx_v12_0_ring_test_ring(struct amdgpu_ring *ring)
        WREG32(scratch, 0xCAFEDEAD);
        r = amdgpu_ring_alloc(ring, 5);
        if (r) {
-               dev_err(adev->dev,
-                       "amdgpu: cp failed to lock ring %d (%d).\n",
+               drm_err(adev_to_drm(adev),
+                       "cp failed to lock ring %d (%d).\n",
                        ring->idx, r);
                return r;
        }
@@ -518,7 +518,7 @@ static int gfx_v12_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               dev_err(adev->dev, "amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err1;
        }
 
index 63e6924a1f223de4fdef8a5e3301efcd0f711412..fd89fb5028a504a4d62193201cbf4be0f8e4f782 100644 (file)
@@ -2010,7 +2010,7 @@ static int gfx_v6_0_cp_gfx_start(struct amdgpu_device *adev)
 
        r = amdgpu_ring_alloc(ring, 7 + 4);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                return r;
        }
        amdgpu_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));
@@ -2031,7 +2031,7 @@ static int gfx_v6_0_cp_gfx_start(struct amdgpu_device *adev)
 
        r = amdgpu_ring_alloc(ring, gfx_v6_0_get_csb_size(adev) + 10);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                return r;
        }
 
index 2fa3a37a26542298bbcfac2a6d2c92095d11082a..2b691452775bc41f339aa67ed80b97e6acc3aea1 100644 (file)
@@ -2465,7 +2465,7 @@ static int gfx_v7_0_cp_gfx_start(struct amdgpu_device *adev)
 
        r = amdgpu_ring_alloc(ring, gfx_v7_0_get_csb_size(adev) + 8);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                return r;
        }
 
index 4e285ed5afaca333ec569f8114dbf991066d15db..028ae5fbdb40599499ccf74a03ddda9c730ecdd3 100644 (file)
@@ -1509,7 +1509,7 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
        r = amdgpu_ib_get(adev, NULL, total_size,
                                        AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%d).\n", r);
                return r;
        }
 
@@ -1604,14 +1604,14 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
        /* shedule the ib on the ring */
        r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
        if (r) {
-               DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
+               drm_err(adev_to_drm(adev), "ib submit failed (%d).\n", r);
                goto fail;
        }
 
        /* wait for the GPU to finish processing the IB */
        r = dma_fence_wait(f, false);
        if (r) {
-               DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+               drm_err(adev_to_drm(adev), "fence wait failed (%d).\n", r);
                goto fail;
        }
 
@@ -4143,7 +4143,7 @@ static int gfx_v8_0_cp_gfx_start(struct amdgpu_device *adev)
 
        r = amdgpu_ring_alloc(ring, gfx_v8_0_get_csb_size(adev) + 4);
        if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
                return r;
        }
 
index 4eadcf58804a7080dddf711133982626e5d65893..e7bc93bb8845e274df2064e98348324e685ff8cb 100644 (file)
@@ -4582,7 +4582,7 @@ static int gfx_v9_0_do_edc_gds_workarounds(struct amdgpu_device *adev)
 
        r = amdgpu_ring_alloc(ring, 7);
        if (r) {
-               DRM_ERROR("amdgpu: GDS workarounds failed to lock ring %s (%d).\n",
+               drm_err(adev_to_drm(adev), "GDS workarounds failed to lock ring %s (%d).\n",
                        ring->name, r);
                return r;
        }
@@ -4671,7 +4671,7 @@ static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
        r = amdgpu_ib_get(adev, NULL, total_size,
                                        AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%d).\n", r);
                return r;
        }
 
@@ -4772,14 +4772,14 @@ static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
        /* shedule the ib on the ring */
        r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
        if (r) {
-               DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
+               drm_err(adev_to_drm(adev), "ib schedule failed (%d).\n", r);
                goto fail;
        }
 
        /* wait for the GPU to finish processing the IB */
        r = dma_fence_wait(f, false);
        if (r) {
-               DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+               drm_err(adev_to_drm(adev), "fence wait failed (%d).\n", r);
                goto fail;
        }
 
index 0b385a15194d98ab89471682cb5793dfc5e7e3e8..2bbb2ff7cb0a66a9228521970d9b535730470e7f 100644 (file)
@@ -850,7 +850,7 @@ static int gmc_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
        if (r) {
-               dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
+               drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
                return r;
        }
 
index 7bd361057c3c5338449680dc00fd4b38eac98bd0..33539e83a4fc9df2f8198ed38fee48aa53c1759f 100644 (file)
@@ -824,7 +824,7 @@ static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
        if (r) {
-               dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
+               drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
                return r;
        }
 
index 57aabe0dcfdfec4470b0483e971809969301ae24..28b5c21cb3d22d5a74e8a3e3516f94159d9c63a6 100644 (file)
@@ -869,7 +869,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
 
        r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
        if (r) {
-               printk(KERN_WARNING "amdgpu: No suitable DMA available.\n");
+               drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
                return r;
        }
 
index 97a04e3171f2dfb29085606fb43928fb3bcbeb67..b0421b261e747a2e5d349be885b922116b31b0a1 100644 (file)
@@ -1975,7 +1975,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block)
                                44;
        r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(dma_addr_bits));
        if (r) {
-               dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
+               drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
                return r;
        }
        adev->need_swiotlb = drm_need_swiotlb(dma_addr_bits);
index 27c76bd424cfb77f5b0f81167c76c12b56d7ba4c..923369ece0d10eea151d81685cff8a0c0b957ccf 100644 (file)
@@ -271,7 +271,7 @@ static int jpeg_v2_0_enable_power_gating(struct amdgpu_device *adev)
                        UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
 
                if (r) {
-                       DRM_ERROR("amdgpu: JPEG enable power gating failed\n");
+                       drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
                        return r;
                }
        }
index d1a011c40ba239e308064072d57668bb0f7e8df3..98f5e0622bc58acaccc410cf8c5d0afa6d7e673d 100644 (file)
@@ -298,7 +298,7 @@ static int jpeg_v3_0_disable_static_power_gating(struct amdgpu_device *adev)
                        UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
 
                if (r) {
-                       DRM_ERROR("amdgpu: JPEG disable power gating failed\n");
+                       drm_err(adev_to_drm(adev), "failed to disable JPEG power gating\n");
                        return r;
                }
        }
@@ -333,7 +333,7 @@ static int jpeg_v3_0_enable_static_power_gating(struct amdgpu_device *adev)
                        UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
 
                if (r) {
-                       DRM_ERROR("amdgpu: JPEG enable power gating failed\n");
+                       drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
                        return r;
                }
        }
index 33db2c1ae6cca151e57d75a62df47cf142b370f7..0bd83820dd20cace8dc342ab6d9961060f005457 100644 (file)
@@ -335,7 +335,7 @@ static int jpeg_v4_0_disable_static_power_gating(struct amdgpu_device *adev)
                        UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
 
                if (r) {
-                       DRM_DEV_ERROR(adev->dev, "amdgpu: JPEG disable power gating failed\n");
+                       drm_err(adev_to_drm(adev), "failed to disable JPEG power gating\n");
                        return r;
                }
        }
@@ -370,7 +370,7 @@ static int jpeg_v4_0_enable_static_power_gating(struct amdgpu_device *adev)
                        UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
 
                if (r) {
-                       DRM_DEV_ERROR(adev->dev, "amdgpu: JPEG enable power gating failed\n");
+                       drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
                        return r;
                }
        }
index 8ddc4df06a1fdecf7b8ce349ce10ba87cca63d83..7811cbb1f7ba34cdffd704767237ad07e49c6d83 100644 (file)
@@ -1031,7 +1031,7 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)
 
        r = amdgpu_ring_alloc(ring, 20);
        if (r) {
-               DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+               drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
                amdgpu_device_wb_free(adev, index);
                return r;
        }
@@ -1096,7 +1096,7 @@ static int sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
        r = amdgpu_ib_get(adev, NULL, 256,
                          AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err0;
        }
 
@@ -1117,11 +1117,11 @@ static int sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = dma_fence_wait_timeout(f, false, timeout);
        if (r == 0) {
-               DRM_ERROR("amdgpu: IB test timed out\n");
+               drm_err(adev_to_drm(adev), "IB test timed out\n");
                r = -ETIMEDOUT;
                goto err1;
        } else if (r < 0) {
-               DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
                goto err1;
        }
 
index 51101b0aa2fabf9555abe83e224e2a748adfe5c1..dbe5b8f109f6ac77183ab43f4744c6f19b8b6a80 100644 (file)
@@ -931,7 +931,7 @@ static int sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring)
 
        r = amdgpu_ring_alloc(ring, 20);
        if (r) {
-               DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+               drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
                amdgpu_device_wb_free(adev, index);
                return r;
        }
@@ -995,7 +995,7 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err0;
        }
 
@@ -1016,11 +1016,11 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = dma_fence_wait_timeout(f, false, timeout);
        if (r == 0) {
-               DRM_ERROR("amdgpu: IB test timed out\n");
+               drm_err(adev_to_drm(adev), "IB test timed out\n");
                r = -ETIMEDOUT;
                goto err1;
        } else if (r < 0) {
-               DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
                goto err1;
        }
 
@@ -1325,8 +1325,8 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)
                ring->use_doorbell = true;
                ring->me = i;
 
-               DRM_INFO("use_doorbell being set to: [%s]\n",
-                               ring->use_doorbell?"true":"false");
+               drm_info(adev_to_drm(adev), "use_doorbell being set to: [%s]\n",
+                        ring->use_doorbell?"true":"false");
 
                ring->doorbell_index =
                        (adev->doorbell_index.sdma_engine[i] << 1); //get DWORD offset
index 651fdfc94a0a86d0c9f7868f26f63bafd343c0f7..eec659194718d0674070e541b8108715a099dae1 100644 (file)
@@ -938,7 +938,7 @@ static int sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring)
 
        r = amdgpu_ring_alloc(ring, 5);
        if (r) {
-               DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+               drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
                amdgpu_device_wb_free(adev, index);
                return r;
        }
@@ -1002,7 +1002,7 @@ static int sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err0;
        }
 
@@ -1023,11 +1023,11 @@ static int sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = dma_fence_wait_timeout(f, false, timeout);
        if (r == 0) {
-               DRM_ERROR("amdgpu: IB test timed out\n");
+               drm_err(adev_to_drm(adev), "IB test timed out\n");
                r = -ETIMEDOUT;
                goto err1;
        } else if (r < 0) {
-               DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
                goto err1;
        }
 
index d2a09e7a1bc279444fb208ca92993bce4e494486..8d16ef257bcb9dff2f57e21b3a688587c503e7b5 100644 (file)
@@ -954,7 +954,7 @@ static int sdma_v7_0_ring_test_ring(struct amdgpu_ring *ring)
 
        r = amdgpu_ring_alloc(ring, 5);
        if (r) {
-               DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+               drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
                amdgpu_device_wb_free(adev, index);
                return r;
        }
@@ -1018,7 +1018,7 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
        if (r) {
-               DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
                goto err0;
        }
 
@@ -1039,11 +1039,11 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 
        r = dma_fence_wait_timeout(f, false, timeout);
        if (r == 0) {
-               DRM_ERROR("amdgpu: IB test timed out\n");
+               drm_err(adev_to_drm(adev), "IB test timed out\n");
                r = -ETIMEDOUT;
                goto err1;
        } else if (r < 0) {
-               DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+               drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
                goto err1;
        }
 
@@ -1504,7 +1504,7 @@ static int sdma_v7_0_ring_preempt_ib(struct amdgpu_ring *ring)
        ring->trail_seq += 1;
        r = amdgpu_ring_alloc(ring, 10);
        if (r) {
-               DRM_ERROR("ring %d failed to be allocated \n", ring->idx);
+               DRM_ERROR("ring %d failed to be allocated\n", ring->idx);
                return r;
        }
        sdma_v7_0_ring_emit_fence(ring, ring->trail_fence_gpu_addr,
index 2e79a3afc7748a86d876f8090dd349a5200f0e54..fea576a7f397f0492b1a2ff7fa9731da361af4b0 100644 (file)
@@ -660,7 +660,7 @@ static int uvd_v3_1_hw_init(struct amdgpu_ip_block *ip_block)
 
        r = uvd_v3_1_fw_validate(adev);
        if (r) {
-               DRM_ERROR("amdgpu: UVD Firmware validate fail (%d).\n", r);
+               drm_err(adev_to_drm(adev), "UVD Firmware validate fail (%d).\n", r);
                return r;
        }
 
@@ -668,13 +668,13 @@ static int uvd_v3_1_hw_init(struct amdgpu_ip_block *ip_block)
 
        r = amdgpu_ring_test_helper(ring);
        if (r) {
-               DRM_ERROR("amdgpu: UVD ring test fail (%d).\n", r);
+               drm_err(adev_to_drm(adev), "UVD ring test failed (%d).\n", r);
                goto done;
        }
 
        r = amdgpu_ring_alloc(ring, 10);
        if (r) {
-               DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
                goto done;
        }
 
@@ -701,7 +701,7 @@ static int uvd_v3_1_hw_init(struct amdgpu_ip_block *ip_block)
 
 done:
        if (!r)
-               DRM_INFO("UVD initialized successfully.\n");
+               drm_info(adev_to_drm(adev), "UVD initialized successfully.\n");
 
        return r;
 }
index 4b96fd583772006b06cd41e5736bab0a4caef7eb..73ce3d211ed64cb6945fe607bbb6ef1f05a2551d 100644 (file)
@@ -167,7 +167,7 @@ static int uvd_v4_2_hw_init(struct amdgpu_ip_block *ip_block)
 
        r = amdgpu_ring_alloc(ring, 10);
        if (r) {
-               DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
                goto done;
        }
 
@@ -194,7 +194,7 @@ static int uvd_v4_2_hw_init(struct amdgpu_ip_block *ip_block)
 
 done:
        if (!r)
-               DRM_INFO("UVD initialized successfully.\n");
+               drm_info(adev_to_drm(adev), "UVD initialized successfully.\n");
 
        return r;
 }
index 71409ad8b7ed1f9bcfefa5a846f6c0a688a0b5ad..12b1b1c9ed66ab42b39f277deb26a84b793c3410 100644 (file)
@@ -164,7 +164,7 @@ static int uvd_v5_0_hw_init(struct amdgpu_ip_block *ip_block)
 
        r = amdgpu_ring_alloc(ring, 10);
        if (r) {
-               DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
                goto done;
        }
 
index ceb94bbb03a48fbb87b6acde664d2ecc1b29dddc..a1d29fae331b485756614b7e58ab932e3d1bd7c9 100644 (file)
@@ -478,7 +478,7 @@ static int uvd_v6_0_hw_init(struct amdgpu_ip_block *ip_block)
 
        r = amdgpu_ring_alloc(ring, 10);
        if (r) {
-               DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+               drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
                goto done;
        }
 
index 1f8866f3f63c71569d6aaf67dcef709f81f7f977..89d9637a2401f11f7ab8155261b48fadf4e0023a 100644 (file)
@@ -542,7 +542,7 @@ static int uvd_v7_0_hw_init(struct amdgpu_ip_block *ip_block)
 
                        r = amdgpu_ring_alloc(ring, 10);
                        if (r) {
-                               DRM_ERROR("amdgpu: (%d)ring failed to lock UVD ring (%d).\n", j, r);
+                               drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
                                goto done;
                        }
 
index 219c537977524580e47bdb9daa98ddf59d218228..b7e00e49c2250f0ff3a6a926727c5020d5a7f542 100644 (file)
@@ -2098,7 +2098,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
                drm_err(adev_to_drm(adev),
                "failed to initialize freesync_module.\n");
        } else
-               drm_dbg_driver(adev_to_drm(adev), "amdgpu: freesync_module init done %p.\n",
+               drm_dbg_driver(adev_to_drm(adev), "freesync_module init done %p.\n",
                                adev->dm.freesync_module);
 
        amdgpu_dm_init_color_mod();
@@ -2120,7 +2120,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
                if (!adev->dm.hdcp_workqueue)
                        drm_err(adev_to_drm(adev), "failed to initialize hdcp_workqueue.\n");
                else
-                       drm_dbg_driver(adev_to_drm(adev), "amdgpu: hdcp_workqueue init done %p.\n", adev->dm.hdcp_workqueue);
+                       drm_dbg_driver(adev_to_drm(adev),
+                                      "hdcp_workqueue init done %p.\n",
+                                      adev->dm.hdcp_workqueue);
 
                dc_init_callbacks(adev->dm.dc, &init_params);
        }