throughput = div64_s64(throughput, time_ms);
- dev_info(adev->dev, "amdgpu: %s %u bo moves of %u kB from"
+ dev_info(adev->dev, " %s %u bo moves of %u kB from"
" %d to %d in %lld ms, throughput: %lld Mb/s or %lld MB/s\n",
kind, n, size >> 10, sdomain, ddomain, time_ms,
throughput * 8, throughput);
*/
void amdgpu_device_fini_hw(struct amdgpu_device *adev)
{
- dev_info(adev->dev, "amdgpu: finishing device.\n");
+ dev_info(adev->dev, "finishing device.\n");
flush_delayed_work(&adev->delayed_init_work);
if (adev->mman.initialized)
}
if (se < max_se && sh < max_sh && cu < 16) {
- DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu);
+ drm_info(adev_to_drm(adev), "Disabling CU %u.%u.%u\n", se, sh, cu);
mask[se * max_sh + sh] |= 1u << cu;
} else {
- DRM_ERROR("amdgpu: disable_cu %u.%u.%u is out of range\n",
- se, sh, cu);
+ drm_err(adev_to_drm(adev), "disable_cu %u.%u.%u is out of range\n",
+ se, sh, cu);
}
next = strchr(p, ',');
static bool amdgpu_gfx_is_compute_multipipe_capable(struct amdgpu_device *adev)
{
if (amdgpu_compute_multipipe != -1) {
- dev_info(adev->dev, "amdgpu: forcing compute pipe policy %d\n",
+ dev_info(adev->dev, " forcing compute pipe policy %d\n",
amdgpu_compute_multipipe);
return amdgpu_compute_multipipe == 1;
}
adev->irq.irq = irq;
adev_to_drm(adev)->max_vblank_count = 0x00ffffff;
- dev_dbg(adev->dev, "amdgpu: irq initialized.\n");
+ dev_dbg(adev->dev, "irq initialized.\n");
return 0;
free_vectors:
uint32_t count;
if (ring->count_dw < 0)
- DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
+ drm_err(adev_to_drm(ring->adev), "writing more dwords to the ring than expected!\n");
/* We pad to match fetch size */
count = ring->funcs->align_mask + 1 -
DRM_DEBUG_DRIVER("Skipped stolen memory reservation\n");
}
- dev_info(adev->dev, "amdgpu: %uM of VRAM memory ready\n",
+ dev_info(adev->dev, " %uM of VRAM memory ready\n",
(unsigned int)(adev->gmc.real_vram_size / (1024 * 1024)));
/* Compute GTT size, either based on TTM limit
dev_err(adev->dev, "Failed initializing GTT heap.\n");
return r;
}
- dev_info(adev->dev, "amdgpu: %uM of GTT memory ready.\n",
+ dev_info(adev->dev, " %uM of GTT memory ready.\n",
(unsigned int)(gtt_size / (1024 * 1024)));
if (adev->flags & AMD_IS_APU) {
ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
ttm_device_fini(&adev->mman.bdev);
adev->mman.initialized = false;
- dev_info(adev->dev, "amdgpu: ttm finalized\n");
+ dev_info(adev->dev, " ttm finalized\n");
}
/**
ret = amdgpu_ring_alloc(ring, 4);
if (ret) {
- dev_err(adev->dev, "amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, ret);
+ dev_err(adev->dev, "dma failed to lock ring %d (%d).\n", ring->idx, ret);
goto out;
}
WREG32(scratch, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 3);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
- ring->idx, r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring %d (%d).\n",
+ ring->idx, r);
return r;
}
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err1;
}
ring = &adev->gfx.gfx_ring[0];
r = amdgpu_ring_alloc(ring, gfx_v10_0_get_csb_size(adev) + 4);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
ring = &adev->gfx.gfx_ring[1];
r = amdgpu_ring_alloc(ring, 2);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
WREG32(scratch, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 5);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
- ring->idx, r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring %d (%d).\n",
+ ring->idx, r);
return r;
}
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err1;
}
ring = &adev->gfx.gfx_ring[0];
r = amdgpu_ring_alloc(ring, gfx_v11_0_get_csb_size(adev));
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(&adev->ddev, "cp failed to lock ring (%d).\n", r);
return r;
}
ring = &adev->gfx.gfx_ring[1];
r = amdgpu_ring_alloc(ring, 2);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
WREG32(scratch, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 5);
if (r) {
- dev_err(adev->dev,
- "amdgpu: cp failed to lock ring %d (%d).\n",
+ drm_err(adev_to_drm(adev),
+ "cp failed to lock ring %d (%d).\n",
ring->idx, r);
return r;
}
r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- dev_err(adev->dev, "amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err1;
}
r = amdgpu_ring_alloc(ring, 7 + 4);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
amdgpu_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));
r = amdgpu_ring_alloc(ring, gfx_v6_0_get_csb_size(adev) + 10);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
r = amdgpu_ring_alloc(ring, gfx_v7_0_get_csb_size(adev) + 8);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
r = amdgpu_ib_get(adev, NULL, total_size,
AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%d).\n", r);
return r;
}
/* shedule the ib on the ring */
r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
if (r) {
- DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
+ drm_err(adev_to_drm(adev), "ib submit failed (%d).\n", r);
goto fail;
}
/* wait for the GPU to finish processing the IB */
r = dma_fence_wait(f, false);
if (r) {
- DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+ drm_err(adev_to_drm(adev), "fence wait failed (%d).\n", r);
goto fail;
}
r = amdgpu_ring_alloc(ring, gfx_v8_0_get_csb_size(adev) + 4);
if (r) {
- DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
r = amdgpu_ring_alloc(ring, 7);
if (r) {
- DRM_ERROR("amdgpu: GDS workarounds failed to lock ring %s (%d).\n",
+ drm_err(adev_to_drm(adev), "GDS workarounds failed to lock ring %s (%d).\n",
ring->name, r);
return r;
}
r = amdgpu_ib_get(adev, NULL, total_size,
AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%d).\n", r);
return r;
}
/* shedule the ib on the ring */
r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
if (r) {
- DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
+ drm_err(adev_to_drm(adev), "ib schedule failed (%d).\n", r);
goto fail;
}
/* wait for the GPU to finish processing the IB */
r = dma_fence_wait(f, false);
if (r) {
- DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
+ drm_err(adev_to_drm(adev), "fence wait failed (%d).\n", r);
goto fail;
}
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
- dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
+ drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
- dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
+ drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
- printk(KERN_WARNING "amdgpu: No suitable DMA available.\n");
+ drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}
44;
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(dma_addr_bits));
if (r) {
- dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
+ drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}
adev->need_swiotlb = drm_need_swiotlb(dma_addr_bits);
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
- DRM_ERROR("amdgpu: JPEG enable power gating failed\n");
+ drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
return r;
}
}
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
- DRM_ERROR("amdgpu: JPEG disable power gating failed\n");
+ drm_err(adev_to_drm(adev), "failed to disable JPEG power gating\n");
return r;
}
}
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
- DRM_ERROR("amdgpu: JPEG enable power gating failed\n");
+ drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
return r;
}
}
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
- DRM_DEV_ERROR(adev->dev, "amdgpu: JPEG disable power gating failed\n");
+ drm_err(adev_to_drm(adev), "failed to disable JPEG power gating\n");
return r;
}
}
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
- DRM_DEV_ERROR(adev->dev, "amdgpu: JPEG enable power gating failed\n");
+ drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
return r;
}
}
r = amdgpu_ring_alloc(ring, 20);
if (r) {
- DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+ drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
r = amdgpu_ib_get(adev, NULL, 256,
AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
- DRM_ERROR("amdgpu: IB test timed out\n");
+ drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
- DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}
r = amdgpu_ring_alloc(ring, 20);
if (r) {
- DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+ drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
- DRM_ERROR("amdgpu: IB test timed out\n");
+ drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
- DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}
ring->use_doorbell = true;
ring->me = i;
- DRM_INFO("use_doorbell being set to: [%s]\n",
- ring->use_doorbell?"true":"false");
+ drm_info(adev_to_drm(adev), "use_doorbell being set to: [%s]\n",
+ ring->use_doorbell?"true":"false");
ring->doorbell_index =
(adev->doorbell_index.sdma_engine[i] << 1); //get DWORD offset
r = amdgpu_ring_alloc(ring, 5);
if (r) {
- DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+ drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
- DRM_ERROR("amdgpu: IB test timed out\n");
+ drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
- DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}
r = amdgpu_ring_alloc(ring, 5);
if (r) {
- DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
+ drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
- DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
- DRM_ERROR("amdgpu: IB test timed out\n");
+ drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
- DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
+ drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}
ring->trail_seq += 1;
r = amdgpu_ring_alloc(ring, 10);
if (r) {
- DRM_ERROR("ring %d failed to be allocated \n", ring->idx);
+ DRM_ERROR("ring %d failed to be allocated\n", ring->idx);
return r;
}
sdma_v7_0_ring_emit_fence(ring, ring->trail_fence_gpu_addr,
r = uvd_v3_1_fw_validate(adev);
if (r) {
- DRM_ERROR("amdgpu: UVD Firmware validate fail (%d).\n", r);
+ drm_err(adev_to_drm(adev), "UVD Firmware validate fail (%d).\n", r);
return r;
}
r = amdgpu_ring_test_helper(ring);
if (r) {
- DRM_ERROR("amdgpu: UVD ring test fail (%d).\n", r);
+ drm_err(adev_to_drm(adev), "UVD ring test failed (%d).\n", r);
goto done;
}
r = amdgpu_ring_alloc(ring, 10);
if (r) {
- DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
done:
if (!r)
- DRM_INFO("UVD initialized successfully.\n");
+ drm_info(adev_to_drm(adev), "UVD initialized successfully.\n");
return r;
}
r = amdgpu_ring_alloc(ring, 10);
if (r) {
- DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
done:
if (!r)
- DRM_INFO("UVD initialized successfully.\n");
+ drm_info(adev_to_drm(adev), "UVD initialized successfully.\n");
return r;
}
r = amdgpu_ring_alloc(ring, 10);
if (r) {
- DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
r = amdgpu_ring_alloc(ring, 10);
if (r) {
- DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
+ drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
r = amdgpu_ring_alloc(ring, 10);
if (r) {
- DRM_ERROR("amdgpu: (%d)ring failed to lock UVD ring (%d).\n", j, r);
+ drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
drm_err(adev_to_drm(adev),
"failed to initialize freesync_module.\n");
} else
- drm_dbg_driver(adev_to_drm(adev), "amdgpu: freesync_module init done %p.\n",
+ drm_dbg_driver(adev_to_drm(adev), "freesync_module init done %p.\n",
adev->dm.freesync_module);
amdgpu_dm_init_color_mod();
if (!adev->dm.hdcp_workqueue)
drm_err(adev_to_drm(adev), "failed to initialize hdcp_workqueue.\n");
else
- drm_dbg_driver(adev_to_drm(adev), "amdgpu: hdcp_workqueue init done %p.\n", adev->dm.hdcp_workqueue);
+ drm_dbg_driver(adev_to_drm(adev),
+ "hdcp_workqueue init done %p.\n",
+ adev->dm.hdcp_workqueue);
dc_init_callbacks(adev->dm.dc, &init_params);
}